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ICS9LPRS511EGLF bảng dữ liệu(PDF) 13 Page - Integrated Device Technology |
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ICS9LPRS511EGLF bảng dữ liệu(HTML) 13 Page - Integrated Device Technology |
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13 / 19 page  13 Integrated Circuit Systems, Inc. ICS9LPRS511 Advance Information 1137—09/05/08 I2C Table: Programmable output divider Register Byte 29 Name Control Function Type PWD A/B/C/D/E/H/J Bit 7 CPUDiv3 RW 0000:/2 0100:/4 1000:/8 1100:/16 X Bit 6 CPUDiv2 RW 0001:/3 0101:/6 1001:/12 1101:/24 X Bit 5 CPUDiv1 RW 0010:/5 0110:/10 1010:/20 1110:/20 X Bit 4 CPUDiv0 RW 0011:/7 0111:/14 1011:/28 1111:/56 X Bit 3 PCIEXDiv3 RW 0000:/2 0100:/4 1000:/8 1100:/10 X Bit 2 PCIEXDiv2 RW 0001:/3 0101:/6 1001:/12 1101:/24 X Bit 1 PCIEXDiv1 RW 0010:/5 0110:/10 1010:/20 1110:/20 X Bit 0 PCIEXDiv0 RW 0011:/7 0111:/14 1011:/28 1111:/56 X I2C Table: Programmable output divider Register Byte 30 Name Control Function Type PWD A/B/C/D/E/H/J Bit 7 PCIEXDiv3 RW 0000:/5 0100:/10 1000:/20 1100:/40 X Bit 6 PCIEXDiv2 RW 0001:/3 0101:/6 1001:/12 1101:/24 X Bit 5 PCIEXDiv1 RW 0010:/N/A 0110:/N/A 1010:/N/A 1110:/N/A X Bit 4 PCIEXDiv0 RW 0011:/N/A 0111:/N/A 1011:/N/A 1111:/N/A X Bit 3 PCIDiv3 RW 0000:/N/A 0100:/N/A 1000:/N/A 1100:/N/A X Bit 2 PCIDiv2 RW 0001:/3 0101:/6 1001:/12 1101:/24 X Bit 1 PCIDiv1 RW 0010:/9 0110:/18 1010:/36 1110:/72 X Bit 0 PCIDiv0 RW 0011:/N/A 0111:/N/A 1011:/N/A 1111:/N/A X I2C Table: Strength Control Register Byte 31 Name Control Function Type PWD A/B/C/D/E/H/J Bit 7 25Str_1 RW 1 Bit 6 25Str_0 RW 1 Bit 5 REFStr_1 RW 1 Bit 4 REFStr_0 RW 1 Bit 3 PCIStr_1 RW 0 Bit 2 PCIStr_0 RW 1 Bit 1 PCIStr_1 RW 1 Bit 0 PCIStr_0 RW 1 I2C Table: Skew programming Register Byte 32 Name Control Function Type PWD A/B/C/D/E/H/J Bit 7 CPUSkw3 RW 0000:0 0100:400 1000:800 1100:1200 0 Bit 6 CPUSkw2 RW 0001:100 0101:500 1001:900 1101:1300 0 Bit 5 CPUSkw1 RW 0010:200 0110:600 1010:1000 1110:1400 0 Bit 4 CPUSkw0 RW 0011:300 0111:700 1011:1100 1111:1500 0 Bit 3 CPUSkw3 RW 0000:0 0100:400 1000:800 1100:1200 0 Bit 2 CPUSkw2 RW 0001:100 0101:500 1001:900 1101:1300 0 Bit 1 CPUSkw1 RW 0010:200 0110:600 1010:1000 1110:1400 0 Bit 0 CPUSkw0 RW 0011:300 0111:700 1011:1100 1111:1500 0 CPUCLK1 Skew Control (ps) CPU Divider Ratio Programming Bits PCIEX Divider Ratio Programming Bits for CPU PLL PCIEX Divider Ratio Programming Bits for PCIEX PLL PCI Divider Ratio Programming Bits CPUCLK0 Skew Control (ps) REFCLK0 Strength Control PCICLK1 Strength Control PCICLK2 Strength Control 25Mhz_0 Strength Control 1 0 01 01 01 00 = tristated Bytes 27 and 28 are reserved 10 = 1.00x 01 = 0.1x 11 = 2.00x 00 = tristated 10 = 1.00x 00 = tristated 10 = 1.00x 01 = 0.1x 11 = 2.00x 01 = 0.1x 11 = 2.00x 01 = 2.00x 11 = 3.00x 00 = tristated 10 = 1.00x |
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