MRF49XA-ISLASHT datasheet(66/102 Pages) MICROCHIP

66 / 102 page

MRF49XA

DS70590C-page 66

Preliminary

3.17

TX Register Buffered Data

Transmission

In Data Transmission mode (enabled by the TXDEN bit

(GENCREG<7>)), the TX data is clocked into one of

the two 8-bit data registers. The transmitter starts to

send the data from the first register (with the given bit

rate) when the TXCEN bit (PMCREG<5>) is set. The

initial value of the data registers (0xAA) can be used to

generate preamble. During this mode, the SDO pin is

monitored to check whether the register is ready (SDO

is high) to receive the next byte from the

microcontroller. The block diagrams of the Transmit

Figure 3-14 and Figure 3-15, respectively.

The transmitter FSK modulation parameters are used

for calculating the resulting output frequency, as shown

in Equation 3-6.

EQUATION 3-6:

FIGURE 3-14:

TX REGISTER BLOCK DIAGRAM (BEFORE TRANSMIT)

fFSKOUT = f0 + (-1)SIGN x (MB + 1) x (15 kHz)

where:

f0 is the Channel Center Frequency

(see Register 2-6 for f0 calculation)

MB is the 4-bit Binary Number (MODBW<3:0>)

SIGN = MODPLY XOR FSK

8-Bit Shift Register

(Default: AAh)

8-Bit Shift Register

(Default: AAh)

Serial Bus Data

SCLK

CLK

SDI

CLK

SDI

SDO

TX_DATA

TXCEN = 0

(Register Initial Fill-up)

MRF49XA-I/T bảng dữ liệu(PDF) 66 Page - Microchip Technology

MRF49XA-I/T bảng dữ liệu(HTML) 66 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL