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ADP150AUJZ-2.65-R7 bảng dữ liệu(PDF) 11 Page - Analog Devices |
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ADP150AUJZ-2.65-R7 bảng dữ liệu(HTML) 11 Page - Analog Devices |
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11 / 20 page ![]() Data Sheet ADP150 Rev. B | Page 11 of 20 THEORY OF OPERATION The ADP150 is an ultralow noise, low quiescent current, low dropout linear regulator that operates from 2.2 V to 5.5 V and can provide up to 150 mA of output current. Drawing a low 220 µA of quiescent current (typical) at full load makes the ADP150 ideal for battery-operated portable equipment. Shutdown current consumption is typically 200 nA. Using new innovative design techniques, the ADP150 provides superior noise performance for noise sensitive analog and RF applications without the need for a noise bypass capacitor. The ADP150 is also optimized for use with small 1 µF ceramic capacitors. VOLTAGE REFERENCE SHORT CIRCUIT, UVLO, AND THERMAL PROTECT SHUTDOWN R1 R2 VOUT VIN GND EN Figure 26. Internal Block Diagram Internally, the ADP150 consists of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device that is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP150 is available in 14 output voltage options, ranging from 1.8 V to 3.3 V. The ADP150 uses the EN pin to enable and disable the VOUT pin under normal operating conditions. When EN is high, VOUT turns on, and when EN is low, VOUT turns off. For automatic startup, EN can be tied to VIN. |
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