FST3306 datasheet(3/5 Pages) FAIRCHILD

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AC Electrical Characteristics

Note 6: This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch

and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). The specified limit is calculated on this basis.

Capacitance

AC Loading and Waveforms

Input driven by 50

Ω source terminated in 50Ω.

CL includes load and stray capacitance.

Input PRR

= 1.0 MHz t

w = 500 ns.

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

TA = −40°C to +85°C

Figure

Number

Symbol

Parameter

VCC

CL = 50 pF, RU = RD = 500Ω

Units

Conditions

(V)

Min

Typ

Max

tPHL,

Prop Delay Bus to Bus

4.0–5.5

0.25

VI = OPEN

Figures

1, 2

tPLH

(Note 6)

tPZL,

Output Enable Time

4.5–5.5

0.8

2.5

4.2

VI = 7V for tPZL

Figures

1, 2

tPZH

4.0

0.8

3.0

4.6

VI = 0V for tPZH

tPLZ,

Output Disable Time

4.5–5.5

0.8

3.1

4.8

VI = 7V for tPLZ

Figures

1, 2

tPHZ

4.0

0.8

2.9

4.4

VI = 0V for tPHZ

Symbol

Parameter

Typ

Max

Units

Conditions

CIN

Control Pin Input Capacitance

2.5

VCC = 0V

CI/O (OFF)

Port OFF Capacitance

VCC = 5.0V = BE

CI/O (ON)

Switch ON Capacitance

VCC = 5.0V, BE = 0V

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