Advanced Clock Drivers Devices

2

Freescale Semiconductor

MPC92432

Figure 1. MPC92432 — Generic Logic Diagram

Figure 2. 48-Lead Package Pinout (Top View)

÷P

XTAL

PLL

÷NB

÷NA

÷M

REF_CLK

XTAL1

XTAL2

REF_SEL

TEST_EN

SDA

SCL

ADR[1:0]

PLOAD

M[9:0]

NA[2:0]

NB

P

CLK_STOPx

BYPASS

MR

QA

QB

LOCK

PLL

Configuration

Registers

It is recommended to use an external

pin. Please see the application section

for details.

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

1

2

3

4

5

6

7

8

9

101112

37

38

39

40

41

42

43

44

45

46

47

48

MPC92432

M9

M8

M7

M6

M5

GND

M4

M3

M2

M1

M0

GND

NA2

NA1

NA0

PLOAD

MR

SDA

SCL

ADR1

ADR0

P

MPC92432

1360 MHz Dual Output LVPECL Clock Synthesizer

NETCOM

IDT™ 1360 MHz Dual Output LVPECL Clock Synthesizer

Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc

MPC92432

2