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ICS551MILF bảng dữ liệu(PDF) 5 Page - Integrated Device Technology

tên linh kiện ICS551MILF
Giải thích chi tiết về linh kiện  1 TO 4 CLOCK BUFFER
PDF  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  IDT [Integrated Device Technology]
Trang chủ  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS551MILF bảng dữ liệu(HTML) 5 Page - Integrated Device Technology

  ICS551MILF Datasheet HTML 1Page - Integrated Device Technology ICS551MILF Datasheet HTML 2Page - Integrated Device Technology ICS551MILF Datasheet HTML 3Page - Integrated Device Technology ICS551MILF Datasheet HTML 4Page - Integrated Device Technology ICS551MILF Datasheet HTML 5Page - Integrated Device Technology ICS551MILF Datasheet HTML 6Page - Integrated Device Technology ICS551MILF Datasheet HTML 7Page - Integrated Device Technology ICS551MILF Datasheet HTML 8Page - Integrated Device Technology ICS551MILF Datasheet HTML 9Page - Integrated Device Technology  
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ICS551
1 TO 4 CLOCK BUFFER
FAN OUT BUFFER
IDT™ 1 TO 4 CLOCK BUFFER
5
ICS551
REV P 051310
AC Electrical Characteristics
VDD = 3.3 V ±10%, Ambient Temperature -40 to +85
° C, unless stated otherwise
VDD = 5 V ±10%, Ambient Temperature -40 to +85
° C, unless stated otherwise
Notes:
1. With rail to rail input clock.
2. Between any 2 outputs with equal loading.
3. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock
generators.
4. With external series resistor of 33
Ω positioned close to each output pin.
Marking Diagram (ICS551MLF)
Marking Diagram (ICS551MLN)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
0
160
MHz
Output Frequency
15 pF load, Note 4
160
MHz
Output Clock Rise Time
tOR
0.8 to 2.0 V
1.0
ns
Output Clock Fall Time
tOF
2.0 to 0.8 V
1.0
ns
Propagation Delay
Note 1
135 MHz
2
4
8
ns
Output to Output Skew
Note 2
Rising edges at VDD/2
250
ps
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
0
135
MHz
Output Frequency
15 pF load, Note 4
135
MHz
Output Clock Rise Time
tOR
0.8 to 2.0 V
1.0
ns
Output Clock Fall Time
tOF
2.0 to 0.8 V
1.0
ns
Propagation Delay
Note 1
135 MHz
1.5
3
6
ns
Output to Output Skew
Note 2
Rising edges at VDD/2
250
ps
551MLF
######
YYWW
14
5
8
551MLN
######
YYWW
14
5
8



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