AFE5809ZCF datasheet(2/90 Pages) TI

2 / 90 page

AFE5809

SLOS738C – SEPTEMBER 2012 – REVISED JANUARY 2013

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION

The AFE5809 is a highly integrated Analog Front-End (AFE) solution specifically designed for ultrasound

systems in which high performance and small size are required. The AFE5809 integrates a complete time-gain-

control (TGC) imaging path and a continuous wave Doppler (CWD) path. It also enables users to select one of

various power/noise combinations to optimize system performance. Therefore, the AFE5809 is a suitable

ultrasound analog front end solution not only for high-end systems, but also for portable ones.

The AFE5809 contains eight channels of voltage controlled amplifier (VCA), 14, and 12-bit Analog-to-Digital

Converter (ADC), and CW mixer. The VCA includes Low noise Amplifier(LNA), Voltage controlled

Attenuator(VCAT), Programmable Gain Amplifier(PGA), and Low-Pass Filter (LPF). The LNA gain is

programmable to support 250 mVPP to 1 VPP input signals. Programmable active termination is also supported by

the LNA. The ultra-low noise VCAT provides an attenuation control range of 40 dB and improves overall low gain

SNR which benefits harmonic imaging and near field imaging. The PGA provides gain options of 24 dB and 30

dB. Before the ADC, a LPF can be configured as 10 MHz, 15 MHz, 20 MHz or 30 MHz to support ultrasound

applications with different frequencies. In addition, the signal chain of the AFE5809 can handle signal frequency

lower than 100 KHz, which enables the AFE5809 to be used in both sonar and medical applications. The high-

performance 14 bit/65 MSPS ADC in the AFE5809 achieves 77 dBFS SNR. It ensures excellent SNR at low

chain gain. The ADC’s LVDS outputs enable flexible system integration desired for miniaturized systems.

The AFE5809 integrates a low power passive mixer and a low noise summing amplifier to accomplish on-chip

CWD beamformer. 16 selectable phase-delays can be applied to each analog input signal. Meanwhile a unique

3rd and 5th order harmonic suppression filter is implemented to enhance CW sensitivity.

AFE5809 also includes a digital in-phase and quadrature (I/Q) demodulator and a low-pass decimation filter. The

main purpose of the demodulation block is to reduce the LVDS data rate and improve overall system power

efficiency. The I/Q demodulator can accept ADC output with up to 65 MSPS sampling rate and 14 bit resolution.

For example, after digital demodulation and 4× decimation filtering, the data rate for either in-phase or

quadrature output is reduced to 16.25 MSPS and the data resolution is improved to 16bit consequently. Hence,

the overall LVDS trace reduction can be a factor of 2. This demodulator can be bypassed and powered down

completely if it is not needed.

The AFE5809 is available in a 15mm × 9mm, 135-pin BGA package and it is specified for operation from 0°C to

85°C.

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