ADS5295IPFP datasheet(59/91 Pages) TI

59 / 91 page

0.5

1.5

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Frequency (MHz)

G043

1.5

2.5

3.5

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Frequency (MHz)

G044

INP

INN

10 W

3.3 pF

Device

10 W

0.1 F

Device

INP

INN

6.8 pF

VCM

ADS5295

www.ti.com

SBAS595 – DECEMBER 2012

Drive Circuit Requirements

For optimum performance, the analog inputs must be driven differentially. This architecture improves the

common-mode noise immunity and even-order harmonic rejection. A small resistor (5

Ω to 10 Ω) in series with

each input pin is recommended to damp out ringing caused by package parasitics. The drive circuits in Figure 47

and Figure 48 show an R-C filter across the analog input pins. The purpose of the filter is to absorb the glitches

caused by the opening and closing of the sampling capacitors. Figure 49 and Figure 50 show the differential

input resistance and capacitance across frequency.

Figure 47. DC-Coupled Drive Circuit with RCR

Figure 48. AC-Coupled Drive Circuit

Figure 49. ADC Differential Input Resistance (RIN)

Figure 50. ADC Differential Input Capacitance (CIN)

vs Frequency

Large- and Small-Signal Input Bandwidth

The small-signal bandwidth of the analog input circuit is high, approximately 500 MHz. When using an amplifier

to drive the ADS5295, the total amplifier noise up to the small-signal bandwidth must be considered. The large-

signal bandwidth of the device depends on the amplitude of the input signal. The ADS5295 supports a 2-VPP

amplitude for input signal frequencies up to 90 MHz. For higher frequencies, the amplitude of the input signal

must be decreased proportionally. For example, at 180 MHz, the device supports a maximum 1-VPP signal.

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