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TLK10232 bảng dữ liệu(PDF) 17 Page - Texas Instruments

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tên linh kiện TLK10232
Giải thích chi tiết về linh kiện  DUAL-CHANNEL XAUI/10GBASE-KR TRANSCEIVER WITH CROSSPOINT
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TLK10232 bảng dữ liệu(HTML) 17 Page - Texas Instruments

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TLK10232
www.ti.com
SLLSEE1 – MAY 2013
The TLK10232 provides two pins: PRBSEN and PRBS_PASS, for additional control and monitoring of
PRBS pattern generation and verification. When PRBSEN is asserted high, the internal PRBS generator
and verifier circuits are enabled on both transmit and receive data paths on high speed and low speed
sides of all channels. PRBS 27-1 is selected by default, and can be changed through MDIO.
When PRBS test is enabled (PRBSEN=1):
•
PRBS_PASS = 1 indicates that PRBS pattern reception is error free.
•
PRBS_PASS = 0 indicates that a PRBS error is detected. The channel, the side (high speed or low
speed), and the lane (for low speed side) that this signal refers to is chosen through MDIO.
3.18 10GBASE-KR Latency
The latency through the TLK10232 in 10GBASE-KR mode is as shown in Figure 3-5. Note that the latency
ranges shown indicate static rather than dynamic latency variance, i.e., the range of possible latencies
when the serial link is initially established. During normal operation, the latency through the device is fixed.
Figure 3-5. 10GBASE-KR Mode Latency Per Block
Copyright © 2013, Texas Instruments Incorporated
1GBASE-KX MODE FUNCTIONAL DESCRIPTION
17
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