LM26480

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SNVS543I – JANUARY 2008 – REVISED MAY 2013

Table 2. PIN DESCRIPTIONS(1) (continued)

WQFN Pin

Name

I/O

Type

Description

No.

14

SW2

O

PWR

Buck2 switcher output pin

15

GND_SW2

G

G

Buck2 NMOS

16

ENLDO2

I

D

LDO2 enable pin, a logic HIGH enables LDO2. Pin cannot be left floating.

17

ENLDO1

I

D

LDO1 enable pin, a logic HIGH enables LDO1. Pin cannot be left floating.

18

GND_L

G

G

LDO ground

19

VINLDO1

I

PWR

Power in from either DC source or battery to LDO1

20

LDO1

O

PWR

LDO1 Output

21

FBL1

I

A

LDO1 Feedback Terminal

22

FBL2

I

A

LDO2 Feedback Terminal

23

LDO2

O

PWR

LDO Output

24

VINLDO2

I

PWR

Power in from either DC source or battery to LDO2.

DAP

DAP

GND

GND

Connection isn't necessary for electrical performance, but it is recommended for

better thermal dissipation.

Note

Power Block Input

Enabled

Disabled

VINLDO12

VIN+

VIN+

Always Powered

AVDD

VIN+

VIN+

Always Powered

VIN1

VIN+

VIN+ or 0V

VIN2

VIN+

VIN+ or 0V

VINLDO1

≤ VIN+

≤ VIN+

If Enabled, Min VIN is 1.74V

VINLDO2

≤ VIN+

≤ VIN+

If Enabled, Min VIN is 1.74V

(1)

VIN+ is the largest potential voltage on the device.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2) (3)

VINLDO12, VIN1, AVDD, VIN2, VINLDO1, VINLDO2, ENSW1, FB1, FB2,

ENSW2, ENLDO1, ENLDO2, SYNC, FBL1, FBL2

−0.3V to +6V

GND to GND SLUG

±0.3V

(4)

1.17W

150°C

Storage Temperature Range

−65°C to +150°C

Maximum Lead Temperature (Soldering)

260°C

ESD Ratings

2 kV

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under

which operation of the device is specified. Operating Ratings do not imply ensured performance limits. For performance limits and

associated test conditions, see the Electrical Characteristics.

(2)

If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

(3)

All voltages are with respect to the potential at the GND pin.

(4)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

part/package in the application (

(5)

The Human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. (MILSTD - 883 3015.7)

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