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STPMS2L-PUR bảng dữ liệu(PDF) 8 Page - STMicroelectronics

tên linh kiện STPMS2L-PUR
Giải thích chi tiết về linh kiện  Smart sensor II dual-channel 1-bit, 4 MHz, second-order sigma-delta modulator with embedded PGLNA
PDF  33 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STPMS2L-PUR bảng dữ liệu(HTML) 8 Page - STMicroelectronics

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Maximum ratings
STPMS2
8/33
Doc ID 16525 Rev 3
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
PSRRDC
Power supply DC
rejection
Voltage signal: 200 mVrms/50Hz
Current signal: 10 mVrms/50Hz
fCLK=2.048 MHz
VCC=3.3V ±10%, 5V ±10%
90
dB
AC measurement accuracy
SNR
Signal to noise ratio
CIP-CIN channel – Vin=±230mV @
55Hz gain 2x over 4 kHz bandwidth
82
dB
VIP-VIN channel – Vin=±230mV @
55Hz over 4 kHz bandwidth
52
SINAD
Signal to noise ratio +
distortion
CIP-CIN channel – Vin=±230mV @
55Hz gain 2x over 4 kHz bandwidth
82
dB
VIP-VIN channel – Vin=±230mV @
55Hz over 4 kHz bandwidth
52
THD
Total harmonic distortion
CIP-CIN channel – Vin=±230mV @
55Hz gain 2x over 4 kHz bandwidth
-105
dB
VIP-VIN channel – Vin=±230mV @
55Hz over 4 kHz bandwidth
-78
SFDR
Spurious free dynamic
range
CIP-CIN channel – Vin=±230mV @
55Hz gain 2x over 4 kHz bandwidth
90
dB
VIP-VIN channel – Vin=±230mV @
55Hz over 4 kHz bandwidth
68
PSRRAC
Power supply AC
rejection
Voltage signal: 200 mVrms/50Hz
Current signal: 10 mVrms/50Hz
fCLK=2.048 MHz
VCC=3.3V+0.2Vrms1@100Hz
VCC=5.0V+0.2Vrms1@100Hz
120
dB
Analog inputs (CIP, CIN, VIP, VIN)
VMAX
Maximum input signal
levels
VIP-VIN channel
-0.3
+0.3
V
STPMS2L
CIP-CIN channel
Gain 2x
Gain 4x
Gain 8x
Gain 16x
STPMS2H
CIP-CIN channel
-0.3
-0.15
-0.075
-0.0375
-VREF/
GAIN
+0.3
+0.15
+0.075
+0.0375
+VREF/
GAIN
V
fSPL
A/D sampling frequency
fCLK
Hz
Voff
Amplifier offset
±20
mV
ZIP
VIP, VIN impedance
Over total operating voltage range
100
400
k
Ω
ZIN
CIP, CIN impedance
Over total operating voltage range
35
50
k
Ω
GERR
Gain error of current
channels
±10
%
Table 5.
General operating conditions (continued)



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