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STM32F051K4U6 bảng dữ liệu(PDF) 80 Page - STMicroelectronics |
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STM32F051K4U6 bảng dữ liệu(HTML) 80 Page - STMicroelectronics |
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80 / 104 page ![]() STM32F051x Electrical characteristics Doc ID 022265 Rev 3 81/105 Figure 24. 12-bit buffered /non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. tSETTLING (2) Settling time (full scale: for a 10-bit input code transition between the lowest and the highest input codes when DAC_OUT reaches final value ±1LSB -3 4 µs CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ Update rate(2) Max frequency for a correct DAC_OUT change when small variation in the input code (from code i to i+1LSB) -- 1 MS/s CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ tWAKEUP (2) Wakeup time from off state (Setting the ENx bit in the DAC Control register) - 6.5 10 µs CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ input code between lowest and highest possible ones. PSRR+ (1) Power supply rejection ratio (to VDDA) (static DC measurement - –67 –40 dB No RLOAD, CLOAD = 50 pF 1. Guaranteed by design, not tested in production. 2. Data based on characterization results, not tested in production. Table 57. DAC characteristics (continued) Symbol Parameter Min Typ Max Unit Comments R LOAD C LOAD Buffered/Non-buffered DAC DACx_OUT Buffer(1) 12-bit digital to analog converter ai17157 |
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