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M68ICS08GR bảng dữ liệu(PDF) 186 Page - Freescale Semiconductor, Inc

tên linh kiện M68ICS08GR
Giải thích chi tiết về linh kiện  M68HC08 Microcontrollers
PDF  408 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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M68ICS08GR bảng dữ liệu(HTML) 186 Page - Freescale Semiconductor, Inc

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Low-Voltage Inhibit (LVI)
Technical Data
MC68HC908GR8 — Rev 4.0
186
Low-Voltage Inhibit (LVI)
MOTOROLA
14.4.1 Polled LVI Operation
In applications that can operate at VDD levels below the VTRIPF level,
software can monitor VDD by polling the LVIOUT bit. In the configuration
register, the LVIPWRD bit must be at logic 0 to enable the LVI module,
and the LVIRSTD bit must be at logic 1 to disable LVI resets.
14.4.2 Forced Reset Operation
In applications that require VDD to remain above the VTRIPF level,
enabling LVI resets allows the LVI module to reset the MCU when VDD
falls below the VTRIPF level. In the configuration register, the LVIPWRD
and LVIRSTD bits must be at logic 0 to enable the LVI module and to
enable LVI resets.
14.4.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having VDD fall below VTRIPF), the LVI
will maintain a reset condition until VDD rises above the rising trip point
voltage, VTRIPR. This prevents a condition in which the MCU is
continually entering and exiting reset if VDD is approximately equal to
VTRIPF. VTRIPR is greater than VTRIPF by the hysteresis voltage, VHYS.
Addr.
Register Name
Bit 7
654321
Bit 0
$FE0C
LVI Status Register
(LVISR)
Read: LVIOUT
0000000
Write:
Reset:
00000000
= Unimplemented
Figure 14-2. LVI I/O Register Summary
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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