M68ICS08GR datasheet(229/408 Pages) FREESCALE

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MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

RAM

229

Technical Data — MC68HC908GR8

Section 17. RAM

17.1 Contents

17.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229

17.3

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229

17.2 Introduction

This section describes the 384 bytes of RAM (random-access memory).

17.3 Functional Description

Addresses $0040 through $01BF are RAM locations. The location of the

stack RAM is programmable. The 16-bit stack pointer allows the stack to

be anywhere in the 64K byte memory space.

NOTE:

For correct operation, the stack pointer must point only to RAM

locations.

Within page zero are 192 bytes of RAM. Because the location of the

stack RAM is programmable, all page zero RAM locations can be used

for I/O control and user data or code. When the stack pointer is moved

from its reset location at $00FF out of page zero, direct addressing mode

instructions can efficiently access all page zero RAM locations. Page

zero RAM, therefore, provides ideal locations for frequently accessed

global variables.

Before processing an interrupt, the CPU uses five bytes of the stack to

save the contents of the CPU registers.

NOTE:

For M6805 compatibility, the H register is not stacked.

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