LP38500-ADJ, LP38502-ADJ

www.ti.com

SNVS539F – NOVEMBER 2007 – REVISED APRIL 2013

PIN DESCRIPTIONS FOR DDPAK/TO-263 and PFM PACKAGES

Pin #

Designation

Function

Enable (LP38502 only). Pull high to enable the output, low to disable the output. This pin has

EN

no internal bias and must be either tied to the input voltage, or actively driven.

1

In the LP38500, this pin has no internal connections. It can be left floating or used for trace

N/C

routing.

2

IN

Input Supply

3

GND

Ground

4

OUT

Regulated Output Voltage

5

ADJ

Sets output voltage

The DAP is used to remove heat from the device by conducting it to the copper clad area on

the PCB which acts as the heatsink. The DAP is electrically connected to the backside of the

DAP

DAP

die. The DAP must be connected to ground potential, but can not be used as the only ground

connection.

Connection Diagrams for WSON Package

Figure 5. 8-Pin WSON, Top View (LP38500SD-ADJ,

Figure 6. 8-Pin WSON, Top View (LP38502SD-ADJ,

LP38500ASD-ADJ)

LP38502ASD-ADJ)

See NGS0008C Package

See NGS0008C Package

PIN DESCRIPTIONS FOR WSON PACKAGE

Pin #

Designation

Function

1

GND

Ground

Input Supply (LP38500 only). Input Supply pins share current and must be connected together

IN

on the PC Board.

2

Enable (LP38502 only). Pull high to enable the output, low to disable the output. This pin has

EN

no internal bias and must be either tied to the input voltage, or actively driven.

Input Supply. Input Supply pins share current and must be connected together on the PC

3, 4

IN

Board.

Regulated Output Voltage. Output pins share current and must be connected together on the

5, 6, 7

OUT

PC Board.

8

ADJ

Sets output voltage

The DAP is used to remove heat from the device by conducting it to a copper clad area on the

PCB which acts as a heatsink. The DAP is electrically connected to the backside of the die. The

DAP

DAP

DAP must be connected to ground potential, but can not be used as the only ground

connection.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Copyright © 2007–2013, Texas Instruments Incorporated

Submit Documentation Feedback

3

Product Folder Links: LP38500-ADJ LP38502-ADJ