MPC5607B datasheet(58/110 Pages) FREESCALE

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MPC5607B Microcontroller Data Sheet, Rev. 6

Electrical characteristics

Freescale Semiconductor

4.8.2

Low voltage detector electrical characteristics

The device implements a power-on reset (POR) module to ensure correct power-up initialization, as well as five low voltage

detectors (LVDs) to monitor the VDD and the VDD_LV voltage while device is supplied:

•

POR monitors VDD during the power-up phase to ensure device is maintained in a safe reset state (refer to RGM

Destructive Event Status (RGM_DES) Register flag F_POR in device reference manual)

•

LVDHV3 monitors VDD to ensure device reset below minimum functional supply (refer to RGM Destructive Event

Status (RGM_DES) Register flag F_LVD27 in device reference manual)

•

LVDHV3B monitors VDD_BV to ensure device reset below minimum functional supply (refer to RGM Destructive

Event Status (RGM_DES) Register flag F_LVD27_VREG in device reference manual)

•

LVDHV5 monitors VDD when application uses device in the 5.0 V ± 10% range (refer to RGM Functional Event Status

(RGM_FES) Register flag F_LVD45 in device reference manual)

•

LVDLVCOR monitors power domain No. 1 (refer to RGM Destructive Event Status (RGM_DES) Register flag

F_LVD12_PD1 in device reference manual)

•

LVDLVBKP monitors power domain No. 0 (refer to RGM Destructive Event Status (RGM_DES) Register flag

F_LVD12_PD0 in device reference manual)

NOTE

When enabled, power domain No. 2 is monitored through LVDLVBKP.

Figure 10. Low voltage detector vs reset

4 External regulator and capacitance circuitry must be capable of providing I

DD_BV while maintaining supply VDD_BV in

operating range.

5 In-rush average current is seen only for short time during power-up and on standby exit (maximum 20 µs, depending

on external capacitances to be loaded).

6 The duration of the in-rush current depends on the capacitance placed on LV pins. BV decoupling capacitors must

be sized accordingly. Refer to IMREG value for minimum amount of current to be provided in cc.

VDD

VLVDHVxH

RESET

VLVDHVxL

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