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SC4524CSETRT bảng dữ liệu(PDF) 15 Page - Samtec, Inc

tên linh kiện SC4524CSETRT
Giải thích chi tiết về linh kiện  28V 2A Step-Down Switching Regulator
PDF  22 Pages
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nhà sản xuất  SAMTEC [Samtec, Inc]
Trang chủ  http://www.samtec.com/
Logo SAMTEC - Samtec, Inc

SC4524CSETRT bảng dữ liệu(HTML) 15 Page - Samtec, Inc

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SC4524C
5
Therefore, the procedure of the voltage loop design for
the SC4524C can be summarized as:
() Plot the converter gain, i.e. control to feedback transfer
function.
(2) Select the open loop crossover frequency, F
C, between
0% and 20% of the switching frequency. At F
C, find the
required compensator gain, A
C. In typical applications with
ceramic output capacitors, the ESR zero is neglected and
the required compensator gain at F
C can be estimated by


x
π
x
x
−
=
O
FB
O
C
S
CA
C
V
V
C
F
2

R
G

log
20
A
(3) Place the compensator zero, F
Z, between 0% and
20% of the crossover frequency, F
C.
(4) Use the compensator pole, F
P, to cancel the ESR zero, FZ.
(5) Then, the parameters of the compensation network
can be calculated by
7

Z
5
R
F
2

C
π
=
7

P
8
R
F
2

C
π
=
m
7
g
0
R
20
C
A
=
where g
m=0.3mA/V is the EA gain of the SC4524C.
Example: Determine the voltage compensator for an
800kHz, 2V to 3.3V/2A converter with 22uF ceramic
output capacitor.
Choose a loop gain crossover frequency of 80kHz, and
place voltage compensator zero and pole at F
Z=6kHz
(20% of F
C), and FP=600kHz. From the equation in step
(2), the required compensator gain at F
C is
Then the compensator parameters are
k
0
0
R
3
7
20
=
x
=
−
nF
0
0
6
2

C
3
3
5
=
π
=
pF
2
0
0
600
2

C
3
3
8
=
π
=
k
2.4
0
0.3
R
3
7
20
.4
=
−
0
0
6
2
C
3
3
5
=
π
pF
0
0
600
2
C
3
3
8
=
π
x
x
x
x
x
x
x
x
2.4
0.8
2.4
Select R
7=2.4k, C5=nF, and C8=22pF for the design.
Compensator parameters for various typical applications
are listed in Table 5. A MathCAD program is also available
upon request for detailed calculation of the compensator
parameters.
Thermal Considerations
For the power transistor inside the SC4524C, the
conduction loss P
C, the switching loss PSW, and bootstrap
circuit loss P
BST, can be estimated as follows:
O
CESAT
C
I
V
D
P
x
=
SW
O
IN
S
SW
F
I
V
t
2

P =
40
I
V
D
P
O
BST
BST =
x
x
x
x x
x
x
whereV
BST is the BST supply voltage and tS is the equivalent
switching time of the NPN transistor (see Table 4).
1A
2A
12V
12.5ns
15.3ns
24V
22ns
25ns
28V
25.3ns
28ns
Load Current
Input Voltage
Table 4. Typical switching time
In addition, the quiescent current loss is
P
Q=VINx2mA
Applications Information (Cont.)



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