DAC8420FPZ2 datasheet(5/24 Pages) AD

5 / 24 page

DAC8420

Rev. B | Page 5 of 24

@ VDD = +15.0 V ± 5%, VSS = −15.0 V ± 5%, VVREFHI = +10.0 V, VVREFLO = −10.0 V, −40°C ≤ TA ≤ +85°C unless otherwise noted.1, 2

Table 2.

Parameter

Symbol

Condition

Min

Typ

Max

Unit

STATIC ACCURACY

Integral Linearity E Grade

INL

±¼

±½

LSB

Integral Linearity F Grade

INL

±½

±1

LSB

Differential Linearity

DNL

Monotonic over temperature

±¼

±1

LSB

Zero-Scale Error

ZSE

RL = 2 kΩ

±2

LSB

Full-Scale Error

FSE

RL = 2 kΩ

±2

LSB

Zero-Scale Temperature Coefficient

TCZSE

RL = 2 kΩ3

±4

ppm/°C

Full-Scale Temperature Coefficient

TCFSE

RL = 2 kΩ3

±4

ppm/°C

MATCHING PERFORMANCE

Linearity Matching

±1

LSB

REFERENCE

Positive Reference Input Range4

VVREFHI

VVREFLO + 2.5

VDD − 2.5

Negative Reference Input Range4

VVREFLO

−10

VVREFHI − 2.5

Reference High Input Current

IVREFHI

Code 0x000, Code 0x555

−2.0

±1.0

+2.0

Reference Low Input Current

IVREFLO

Code 0x000, Code 0x555

−3.5

−2.0

AMPLIFIER CHARACTERISTICS

Output Current

IOUT

−5

Settling Time

To 0.01%5

μs

Slew Rate

10% to 90%5

V/μs

DYNAMIC PERFORMANCE

Analog Crosstalk3

>64

Digital Feedthrough3

>72

Large Signal Bandwidth

3 dB, VVREFHI = 5 V + 10 V p-p, VVREFLO = −10 V3

kHz

Glitch Impulse

Code Transition = 0x7FF to 0x8003

μV-s

LOGIC CHARACTERISTICS

Logic Input High Voltage

VINH

2.4

Logic Input Low Voltage

VINL

0.8

Logic Input Current

IIN

μA

Input Capacitance3

CIN

LOGIC TIMING CHARACTERISTICS3, 6

Data Setup Time

tDS

Data Hold

tDH

Clock Pulse Width High

tCH

Clock Pulse Width Low

tCL

Select Time

tCSS

Deselect Delay

tCSH

Load Disable Time

tLD1

Load Delay

tLD2

Load Pulse Width

tLDW

Clear Pulse Width

tCLRW

SUPPLY CHARACTERISTICS

Power Supply Sensitivity

PSRR

0.002

0.01

%/%

Positive Supply Current

IDD

Negative Supply Current

ISS

−8

−5

Power Dissipation

PDISS

255

1 Typical values indicate performance measured at 25°C.

2 All supplies can be varied ±5% and operation is guaranteed.

3 Guaranteed, but not tested.

4 Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.

5 VOUT swing between +10 V and −10 V.

6 All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.

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