AD9226AST datasheet(18/28 Pages) AD

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REV. B

AD9226

–18–

LOGIC

DISABLE

A/D

AD9226

CAPT

CAPB

VREF

SENSE

REFCOM

2.5V

Figure 11a. Equivalent Reference Circuit

0.1 F

10 F

0.1 F

CAPT

CAPB

AD9226

VREF

0.1 F

10 F

Figure 11b. CAPT and CAPB DC-Coupling

The actual reference voltages used by the internal circuitry of the

AD9226 appear on the CAPT and CAPB pins. The voltages

on these pins are symmetrical about the analog supply. For

proper operation when using an internal or external reference, it

is necessary to add a capacitor network to decouple these pins.

Figure 11b shows the recommended decoupling network. The

turn-on time of the reference voltage appearing between CAPT

and CAPB is approximately 10 ms and should be evaluated in

any power-down mode of operation.

USING THE INTERNAL REFERENCE

The AD9226 can be easily configured for either a 1 V p-p input

span or 2 V p-p input span by setting the internal reference.

Other input spans can be realized with two external gain-

setting resistors as shown in Figure 12 of this data sheet, or

using an external reference.

Pin Programmable Reference

By shorting the VREF pin directly to the SENSE pin, the inter-

nal reference amplifier is placed in a unity-gain mode and the

resultant VREF output is 1 V. By shorting the SENSE pin

directly to the REFCOM pin, the internal reference amplifier is

configured for a gain of 2.0 and the resultant VREF output is

2.0 V. The VREF pin should be bypassed to the REFCOM pin

with a 10

µF tantalum capacitor in parallel with a low-inductance

0.1

µF ceramic capacitor as shown in Figure 11b.

Resistor Programmable Reference

Figure 12 shows an example of how to generate a reference

voltage other than 1.0 V or 2.0 V with the addition of two exter-

nal resistors. Use the equation,

VREF = 1 V

× (1 + R1/R2)

to determine appropriate values for R1 and R2. These resistors

should be in the 2 k

Ω to 10 kΩ range. For the example shown,

R1 equals 2.5 k

Ω and R2 equals 5 kΩ. From the equation above,

the resultant reference voltage on the VREF pin is 1.5 V. This

sets the input span to be 1.5 V p-p. The midscale voltage can

also be set to VREF by connecting VINB to VREF. Alterna-

tively, the midscale voltage can be set to 2.5 V by connecting

VINB to a low-impedance 2.5 V source as shown in Figure 12.

VINA

VREF

AD9226

VINB

1.75V

SENSE

REFCOM

0.1 F

10 F

0.1 F

15pF

3.25V

1.5V

0.1 F

CAPT

2.5V

10 F

2.5k

CAPB

Figure 12. Resistor Programmable Reference (1.5 V p-p

Input Span, Differential Input VCM = 2.5 V)

USING AN EXTERNAL REFERENCE

The AD9226 contains an internal reference buffer, A2 (see

Figure 11b), that simplifies the drive requirements of an external

reference. The external reference must be able to drive about

Ω (±20%) load. Note that the bandwidth of the reference

buffer is deliberately left small to minimize the reference noise

contribution. As a result, it is not possible to rapidly change the

reference voltage in this mode.

Figure 13 shows an example of an external reference driving

both VINB and VREF. In this case, both the common-mode

voltage and input span are directly dependent on the value of

VREF. Both the input span and the center of the input span are

equal to the external VREF. Thus the valid input range extends

from (VREF + VREF/2) to (VREF – VREF/2). For example,

if the REF191, a 2.048 V external reference, is selected, the

input span extends to 2.048 V. In this case, 1 LSB of the AD9226

corresponds to 0.5 mV. It is essential that a minimum of a 10

µF

capacitor, in parallel with a 0.1

µF low-inductance ceramic

capacitor, decouple the reference output to ground.

To use an external reference, the SENSE pin must be connected

to AVDD. This connection will disable the internal reference.

VINA

VREF

AD9226

VINB

SENSE

0.1 F

10 F

0.1 F

15pF

VINA+VREF/2

0.1 F

CAPT

CAPB

VINB–VREF/2

10 F

VREF

0.1 F

Figure 13. Using an External Reference

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