SST25WF020A datasheet(13/36 Pages) MICROCHIP

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Preliminary

DS21392A-page 13

SST25WF020A

5.8

Write-Enable (WREN)

The Write-Enable (WREN) instruction, 06H, sets the

Write-Enable-Latch bit in the Status Register to 1 allow-

ing Write operations to occur. The WREN instruction

must be executed prior to any Write (Program/Erase)

operation. The WREN instruction may also be used to

allow execution of the Write-Status-Register (WRSR)

instruction; however, the Write-Enable-Latch bit in the

Status Register will be cleared upon the rising edge

CE# of the WRSR instruction. CE# must be driven low

before entering the WREN instruction, and CE# must

be driven high before executing the WREN instruction.

See Figure 5-8 for the WREN instruction sequence.

FIGURE 5-8:

WRITE ENABLE (WREN) SEQUENCE

5.9

Write-Disable (WRDI)

The Write-Disable (WRDI) instruction, 04H, resets the

Write-Enable-Latch bit to ‘0’, thus preventing any new

Write operations. CE# must be driven low before enter-

ing the WRDI instruction, and CE# must be driven high

before executing the WRDI instruction. See Figure 5-11

for the WRDI instruction sequence.

FIGURE 5-9:

WRITE DISABLE (WRDI) SEQUENCE

CE#

SCK

01 2 3 4 5 6 7

HIGH IMPEDANCE

MODE 0

MODE 3

25139 F18.0

MSB

CE#

SCK

01 2 3 4 5 6 7

HIGH IMPEDANCE

MODE 0

MODE 3

25139 F19.0

MSB

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