FV16KM202 datasheet(39/336 Pages) MICROCHIP

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Advance Information

DS33030A-page 39

PIC24FV16KM204 FAMILY

3.3

Arithmetic Logic Unit (ALU)

The PIC24F ALU is 16 bits wide and is capable of

addition, subtraction, bit shifts and logic operations.

Unless otherwise mentioned, arithmetic operations are

2’s complement in nature. Depending on the operation,

the ALU may affect the values of the Carry (C), Zero

(Z), Negative (N), Overflow (OV) and Digit Carry (DC)

Status bits in the SR register. The C and DC Status bits

operate as Borrow and Digit Borrow bits, respectively,

for subtraction operations.

The ALU can perform 8-bit or 16-bit operations,

depending on the mode of the instruction that is used.

Data for the ALU operation can come from the W

addressing mode of the instruction. Likewise, output

data from the ALU can be written to the W register array

or a data memory location.

The PIC24F CPU incorporates hardware support for

both multiplication and division. This includes a

dedicated hardware multiplier and support hardware

division for 16-bit divisor.

3.3.1

MULTIPLIER

The ALU contains a high-speed, 17-bit x 17-bit

multiplier. It supports unsigned, signed or mixed sign

operation in several multiplication modes:

• 16-bit x 16-bit signed

• 16-bit x 16-bit unsigned

• 16-bit signed x 5-bit (literal) unsigned

• 16-bit unsigned x 16-bit unsigned

• 16-bit unsigned x 5-bit (literal) unsigned

• 16-bit unsigned x 16-bit signed

• 8-bit unsigned x 8-bit unsigned

CORCON: CPU CONTROL REGISTER

U-0

—

bit 15

bit 8

U-0

R/C-0, HSC

R/W-0

U-0

—

—IPL3(1)

PSV

—

bit 7

bit 0

Legend:

C = Clearable bit

HSC = Hardware Settable/Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-4

Unimplemented: Read as ‘0’

bit 3

IPL3: CPU Interrupt Priority Level Status bit(1)

1 = CPU Interrupt Priority Level is greater than 7

0 = CPU Interrupt Priority Level is 7 or less

bit 2

PSV: Program Space Visibility in Data Space Enable bit

1 = Program space is visible in data space

0 = Program space is not visible in data space

bit 1-0

Unimplemented: Read as ‘0’

Note 1:

User interrupts are disabled when IPL3 = 1.

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