MPIC2113

2

Motorola TMOS Power MOSFET Transistor Device Data

SIMPLIFIED BLOCK DIAGRAM

PULSE

GEN

UV

DETECT

PULSE

FILTER

HV

LEVEL

SHIFT

COM

LO

VCC

VS

VB

HO

R

R

S

Q

VDD

HIN

SD

LIN

VSS

UV

DETECT

DELAY

VDD/VCC

LEVEL

SHIFT

VDD/VCC

LEVEL

SHIFT

R Q

S

R Q

S

ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute

voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air

conditions.

Rating

Symbol

Min

Max

Unit

High Side Floating Absolute Voltage

High Side Floating Supply Offset Voltage

High Side Floating Output Voltage

Low Side Fixed Supply Voltage

Low Side Output Voltage

Logic Supply Voltage

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

VB

VS

VHO

VCC

VLO

VDD

VSS

VIN

–0.3

VB–25

VS–0.3

–0.3

–0.3

–0.3

VCC–25

VSS–0.3

625

VB+0.3

VB+0.3

25

VCC+0.3

VSS+25

VCC+0.3

VDD+0.3

VDC

High Side Floating Absolute Voltage

High Side Floating Supply Offset Voltage

High Side Floating Output Voltage

Low Side Fixed Supply Voltage

Low Side Output Voltage

Logic Supply Voltage

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

VB

VS

VHO

VCC

VLO

VDD

VSS

VIN

–0.3

VB–25

VS–0.3

–0.3

–0.3

–0.3

VCC–25

VSS–0.3

625

VB+0.3

VB+0.3

25

VCC+0.3

VSS+25

VCC+0.3

VDD+0.3

VDC

High Side Floating Supply Offset Voltage

High Side Floating Output Voltage

Low Side Fixed Supply Voltage

Low Side Output Voltage

Logic Supply Voltage

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

VS

VHO

VCC

VLO

VDD

VSS

VIN

VB–25

VS–0.3

–0.3

–0.3

–0.3

VCC–25

VSS–0.3

VB+0.3

VB+0.3

25

VCC+0.3

VSS+25

VCC+0.3

VDD+0.3

High Side Floating Output Voltage

Low Side Fixed Supply Voltage

Low Side Output Voltage

Logic Supply Voltage

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

VHO

VCC

VLO

VDD

VSS

VIN

VS–0.3

–0.3

–0.3

–0.3

VCC–25

VSS–0.3

VB+0.3

25

VCC+0.3

VSS+25

VCC+0.3

VDD+0.3

Low Side Fixed Supply Voltage

Low Side Output Voltage

Logic Supply Voltage

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

VCC

VLO

VDD

VSS

VIN

–0.3

–0.3

–0.3

VCC–25

VSS–0.3

25

VCC+0.3

VSS+25

VCC+0.3

VDD+0.3

Logic Supply Voltage

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

LO

VDD

VSS

VIN

–0.3

VCC–25

VSS–0.3

CC+0.3

VSS+25

VCC+0.3

VDD+0.3

Logic Supply Offset Voltage

Logic Input Voltage (HIN, LIN & SD)

DD

VSS

VIN

VCC–25

VSS–0.3

SS+25

VCC+0.3

VDD+0.3

Logic Input Voltage (HIN, LIN & SD)

SS

VIN

CC–25

VSS–0.3

CC+0.3

VDD+0.3

Allowable Offset Supply Voltage Transient

dVS/dt

–

50

V/ns

*Package Power Dissipation @ TA ≤ +25°C

(14 Lead DIP)

(16 SOIC–WIDE)

PD

–

–

–

1.6

1.25

Watt

Thermal Resistance, Junction to Ambient

(14 Lead DIP)

(16 SOIC–WIDE)

R

θJA

–

–

75

100

°C/W

Operating and Storage Temperature

Tj, Tstg

–55

150

°C

Lead Temperature for Soldering Purposes, 10 seconds

TL

–

260

°C

RECOMMENDED OPERATING CONDITIONS

The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi-

tions. The VS and VSS offset ratings are tested with all supplies biased at 15 V differential.

High Side Floating Supply Absolute Voltage

VB

VS+10

VS+20

V

High Side Floating Supply Offset Voltage

VS

Note 1

600

High Side Floating Output Voltage

VHO

VS

VB

Low Side Fixed Supply Voltage

VCC

10

20

Low Side Output Voltage

VLO

0

VCC

Logic Supply Voltage

VDD

VSS+5

VSS+20

Logic Supply Offset Voltage

VSS

–5

5

Logic Input Voltage (HIN, LIN & SD)

VIN

VSS

VDD

Ambient Temperature

TA

–40

125

°C

Note 1: Logic operational for VS of –5 to +600 V. Logic state held for VS of –5 V to –VBS.