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WM8783GED/V bảng dữ liệu(PDF) 11 Page - Wolfson Microelectronics plc

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Production Data
WM8783
w
PD, August 2010, Rev 4.0
11
The digital audio interface supports many common sample rates, as detailed in Table 1. The required
MCLK frequency in each case is also noted.
The WM8783 will automatically determine the MCLK / fs ratio according to the supplied LRCLK and
MCLK inputs. Note that the BCLK frequency is 64 x fs in all cases.
SAMPLE RATE
MCLK
MCLK RATIO
8kHz
2.048MHz
256 x fs
16kHz
4.096MHz
256 x fs
32kHz
8.192MHz
256 x fs
44.1kHz
11.2896MHz
256 x fs
48kHz
12.288MHz
256 x fs
88.2kHz
11.2896MHz
128 x fs
96kHz
12.288MHz
128 x fs
Table 1 Digital Audio Interface Clocking
The WM8783 supports 24-bit stereo operation in I2S digital audio format.
In I2S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition,
as illustrated in Figure 5. The other bits up to the LSB are then transmitted in order.
Note that there are unused BCLK cycles between the LSB of one sample and the MSB of the next.
Note that BCLK is generated internally and is not transmitted or received externally to the WM8783.
Figure 5 I2S Digital Audio Interface format (assuming n-bit word length)



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