PCAL9554CBS datasheet(15/42 Pages) NXP

15 / 42 page

PCAL9554B_PCAL9554C

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Product data sheet

Rev. 2 — 10 December 2012

15 of 42

NXP Semiconductors

PCAL9554B; PCAL9554C

Low-voltage 8-bit I2C-bus/SMBus low power I/O port

Application design-in information

8.1 Minimizing IDD when the I/Os are used to control LEDs

When the I/Os are used to control LEDs, they are normally connected to VDD through a

resistor as shown in Figure 12. Since the LED acts as a diode, when the LED is off the

I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes

lower than VDD.

Designs needing to minimize current consumption, such as battery power applications,

should consider maintaining the I/O pins greater than or equal to VDD when the LED is off.

Figure 13 shows a high value resistor in parallel with the LED, which is not needed with

the PCAL9554B or PCAL9554C that integrate a weak pull-up resistor on all pins.

Figure 14 shows VDD less than the LED supply voltage by at least 1.2 V. Both of these

methods maintain the I/O VI at or above VDD and prevents additional supply current

consumption when the LED is off.

Device address is 0100 000x for this example using PCAL9554B (address for PCAL9554C is 0111 000x).

P0, P2, P3 configured as outputs.

P1, P4, P5 configured as inputs.

P6, P7 are not used and need 100 k

 pull-up resistors to protect them from floating or the internal pull-up or pull-down

selected.

(1) No resistors are required for inputs (on P port) that may float due to the weak pull-up integrated into the device.

Fig 12. Typical application

PCAL9554B

SCL

SDA

VDD

(3.3 V)

MASTER

CONTROLLER

SCL

SDA

INT

VDD

VSS

INT

10 kΩ

SUB-SYSTEM 1

(e.g., temp sensor)

INT

SUB-SYSTEM 2

(e.g., counter)

RESET

controlled

switch

(e.g., CBT device)

enable

VSS

002aah211

10 kΩ

2 kΩ

100 kΩ

(× 3)(1)

SUB-SYSTEM 3

(e.g., alarm system)

ALARM

VDD

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