OP183GP datasheet(3/12 Pages) AD

3 / 12 page

REV.B

ELECTRICAL CHARACTERISTICS

Parameter

Symbol

Conditions

Min

Typ

Max

Units

INPUT CHARACTERISTICS

Offset Voltage

0.01

1.0

–40

°C ≤ T

A ≤ +85°C

1.25

Input Bias Current

300

600

–40

°C ≤ T

A ≤ +85°C

400

750

Input Offset Current

–40

≤ T

A ≤ +85°C11

±50

Input Voltage Range

–15

+13.5

Common-Mode Rejection Ratio

CMRR

CM = –15 V to +13.5 V,

–40

°C ≤ T

A ≤ +85°C70

Large Signal Voltage Gain

L = 2 kΩ

100

1000

V/mV

Offset Voltage Drift

∆V

OS/∆T3

µV/°C

Bias Current Drift

∆I

B/∆T

–1.6

nA/

°C

Long Term Offset Voltage

Note 1

1.5

OUTPUT CHARACTERISTICS

Output Voltage High

L = 2 kΩ to GND, –40°C ≤ TA ≤ +85°C

+13.9 14.1

Output Voltage Low

L = 2 kΩ to GND, –40°C ≤ TA ≤ +85°C

–14.05

–13.9

Short-Circuit Limit

Source

Sink

Open -Loop Output Impedance

OUT

f = 1 MHz, A

V = +1

Ω

POWER SUPPLY

Power Supply Rejection Ratio

PSRR

S = ± 2.5 V to ± 18 V,

–40

°C ≤ T

A ≤ +85°C

112

Supply Current/Amplifier

S = ± 18 V, VO = 0 V,

–40

°C ≤ T

A ≤ +85°C

1.2

1.75

Supply Voltage Range

±18

DYNAMIC PERFORMANCE

Slew Rate

L = 2 kΩ

µs

Full-Power Bandwidth

1% Distortion

kHz

Settling Time

To 0.01%

1.5

µs

Gain Bandwidth Product

GBP

MHz

Phase Margin

φm

degrees

NOISE PERFORMANCE

Voltage Noise

n p-p

0.1 Hz to 10 Hz

µV p-p

Voltage Noise Density

f = 1 kHz

nV/

√Hz

Current Noise Density

0.4

pA/

√Hz

NOTES

1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125

°C, with an LTPD of 1.3.

Specifications subject to change without notice.

(@ V

S =

15.0 V, T

A = +25 C unless otherwise noted)

WAFER TEST LIMITS

Parameter

Symbol

Conditions

Limit

Units

Offset Voltage

S = ± 15 V, VO = 0 V

1.0

mV max

Input Bias Current

CM = 2.5 V

±600

nA max

Input Offset Current

CM = 2.5 V

±50

nA max

Common-Mode Rejection

CMRR

CM = 0 V to 3.5 V

dB min

Power Supply Rejection Ratio

PSRR

V =

±2.5 V to ±18 V

dB min

Large Signal Voltage Gain

L = 2 kΩ, 0.2 ≤ VO

≤ 3.8 V

100

V/mV min

Output Voltage High

L = 2 kΩ

4.0

V min

Output Voltage Low

L = 2 kΩ

mV max

Supply Current/Amplifier

S = ± 15 V, VO = 0 V, RL =

∞

1.5

mA max

NOTE

Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard

product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.

(@ V

S = +5.0 V, TA = +25 C unless otherwise noted)

OP183/OP283

–3–

OP183GP bảng dữ liệu(PDF) 3 Page - Analog Devices

OP183GP bảng dữ liệu(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

bảng dữ liệu tải về

Link URL