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LM8335 bảng dữ liệu(PDF) 11 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  LM8335 General Purpose Output Expander with MIPI짰 RFFE Host Interface
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LM8335
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SNVS840 – JUNE 2012
Table 1. Register Listing (continued)
Register Name
Addr
Bit
Default
Description
GPO output data mask
0 = GPO_OUT_DATA masked
1 = GPO_OUT_DATA unmasked
0xFF
Note: Only the GPO_OUT_DATA register write is affected by
(CFG=0) or
GPO_OUT_MASK
0x04
7:0
the GPO_OUT_MASK register. When the GPO_OUT_MASK
0x00
bit is set low (masked), writing to GPO_OUT_DATA register
(CFG=1)
will leave the pin state unchanged. When the
GPO_OUT_MASK bit is set high (unmasked), the GPO output
will be updated when the GPO_OUT_DATA is written (only
GPOs that are unmasked will be changed).
GPO output data
0 = pin set low
1 = pin set high
GPO_OUT_DATA
0x05
7:0
0x00
Note: GPO_OUT_HIGH_CFG register selects if the pin is
driven or high-z. The pin state will follow GPO_OUT_DATA
only if the corresponding bit is unmasked in the
GPO_OUT_MASK register.
MIPI RFFE power mode and trigger register
PM_TRIG
0x1C
7:0
0x00
Bits 7:6 = PWR_MODE
Bits 5:0 = TRIG_REG
This is a MIPI RFFE reserved read only register and can not
be read since readback is not supported on this device.
PROD_ID
0x1D
7:0
0xC4
Bits 7:0 = PRODUCT_ID [7:0]
The product ID is provided as information only to support the
RFFE USID programming feature.
This is a MIPI RFFE reserved read-only register and can not
be read since readback is not supported on this device.
MAN_ID
0x1E
7:0
0x02
Bits 7:0 = MANUFACTURER_ID [7:0]
The manufacturer ID is provided as information only to support
the RFFE USID programming feature.
0x11
This MIPI RFFE reserved register
(ADR=0)
or
Bits 7:6 = SPARE
0x19
Bits 5:4 = MANUFACTURER_ID [9:8] = 1
(ADR=1)
Bits 3:0 = Programmable Unique Slave Identifier
— ADR=Low, USID[3:0]=0001
USID_REG
0x1F
7:0
— ADR=High, USID[3:0]=1001
Note: The USID is initially set based on the state of the ADR
pin (default value when ADR=Low shown). This register can
not be read since readback is not supported on this device.
USID_REG[5:4] are provided as information only to support
the RFFE USID programming feature.
Table 2. General Bit Field Layout for GPO_x Registers
7
6
5
4
3
2
1
0
GPO_7
GPO_6
GPO_5
GPO_4
GPO_3
GPO_2
GPO_1
GPO_0
Table 3. CNTL_REG Register Bit Fields
7
6
5
4
3
2
1
0
rsvd
rsvd
rsvd
rsvd
rsvd
rsvd
rsvd
SW_RESET
Copyright © 2012, Texas Instruments Incorporated
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