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INA231AIYFFR bảng dữ liệu(PDF) 22 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  High- or Low-Side Measurement, Bidirectional CURRENT/POWER MONITOR with 1.8-V I2C??Interface
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INA231
SBOS644 – FEBRUARY 2013
www.ti.com
Current Register (04h, Read-Only)
If averaging is enabled, this register displays the averaged value.
BIT #
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
BIT
CSIGN
CD14
CD13
CD12
CD11
CD10
CD9
CD8
CD7
CD6
CD5
CD4
CD3
CD2
CD1
CD0
NAME
POR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VALUE
The value of the Current register is calculated by multiplying the decimal value in the Shunt Voltage register with
the decimal value of the Calibration register, according to Equation 3.
Calibration Register (05h, Read/Write)
This register provides the INA231 with the shunt resistor value that was present to create the measured
differential voltage. This register also sets the resolution of the Current register. The Current register LSB and
Power register LSB are set through the programming of this register. This register is also used for overall system
calibration. See the Configure/Measure/Calculate Example for more information on programming this register.
BIT #
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
BIT
—
FS14
FS13
FS12
FS11
FS10
FS9
FS8
FS7
FS6
FS5
FS4
FS3
FS2
FS1
FS0
NAME
POR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VALUE
Mask/Enable Register (06h, Read/Write)
The Mask/Enable register selects the function that controls the ALERT pin, as well as how that pin functions. If
multiple functions are enabled, the highest significant bit position alert function (D15:D11) takes priority and
responds to the Alert Limit register.
BIT #
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
BIT
SOL
SUL
BOL
BUL
POL
CNVR
—
—
—
—
—
AFF
CVRF
OVF
APOL
LEN
NAME
POR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VALUE
SOL:
Shunt Voltage Over-Voltage
Bit 15
Setting this bit high configures the ALERT pin to be asserted when the shunt voltage conversion exceeds the value
in the Alert Limit register.
SUL:
Shunt Voltage Under-Voltage
Bit 14
Setting this bit high configures the ALERT pin to be asserted when the shunt voltage conversion drops below the
value in the Alert Limit register.
BOL:
Bus Voltage Over-Voltage
Bit 13
Setting this bit high configures the ALERT pin to be asserted when the bus voltage conversion exceeds the value in
the Alert Limit register.
BUL:
Bus Voltage Under-Voltage
Bit 12
Setting this bit high configures the ALERT pin to be asserted when the bus voltage conversion drops below the
value in the Alert Limit register.
POL:
Over-Limit Power
Bit 11
Setting this bit high configures the ALERT pin to be asserted when the power calculation exceeds the value in the
Alert Limit register.
22
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: INA231



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