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RT8073 bảng dữ liệu(PDF) 2 Page - Richtek Technology Corporation |
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RT8073 bảng dữ liệu(HTML) 2 Page - Richtek Technology Corporation |
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2 / 16 page ![]() RT8073 2 DS8073-01 November 2012 www.richtek.com © Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Functional Pin Description Pin Configurations (TOP VIEW) SOP-8 (Exposed Pad) WDFN-12L 3x3 COMP GND EN VIN FB RT BOOT LX PGND 2 3 4 5 6 7 8 9 COMP PGOOD VIN EN FB RT LX LX LX SS VIN BOOT 11 10 9 1 2 3 4 5 12 67 8 13 Pin No. SOP-8 (Exposed Pad) WDFN-12L 3x3 Pin Name Pin Function 1 1 COMP Compensation Node. 2 -- GND Analog Ground. 3 4 EN Chip Enable. Externally pulled high to enable and pulled low to disable this chip, and it is internally pulled up to high when the pin is floating. 4 5, 6 VIN Power Input. 5 7 BOOT Bootstrap Supply for High Side Gate Driver. 6 8, 9, 10 LX Switch Node. 7 11 RT Frequency Setting. 8 12 FB Feedback Voltage Input. 9 13 (Exposed Pad) PGND Power Ground. The exposed pad must be shouldered to a large PCB and connected to PGND for maximum power dissipation. -- 2 PGOOD Power Good Indicator with Open Drain Output. It is high impedance when the output voltage is regulated. It is internally pulled low when the chip is shutdown, thermal shutdown or VIN is under UVLO threshold. -- 3 SS Soft-Start Control. |
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