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ADV7175A bảng dữ liệu(PDF) 38 Page - Analog Devices |
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ADV7175A bảng dữ liệu(HTML) 38 Page - Analog Devices |
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38 / 52 page ![]() ADV7175A/ADV7176A –38– REV. B For external buffering of the ADV7175A/ADV7176A DAC outputs, the configuration in Figure 71 is recommended. This configu- ration shows the DAC outputs running at half (18 mA) their full current (36 mA) capability. This will allow the ADV7175A/ADV7176A to dissipate less power, the analog current is reduced by 50% with a RSET of 300 Ω and a R LOAD of 75 Ω. This mode is recommended for 3.3 volt operation as optimum performance is obtained from the DAC outputs at 18 mA with a VAA of 3.3 volts. This buffer also adds extra isolation on the video outputs, see buffer circuit in Figure 72. When calculating absolute output full current and voltage, use the following equation: VOUT = I OUT × R LOAD IOUT = VREF × K () RSET K = 4.2146 constant ,V REF = 1.235 V ADV7175A/ADV7176A VREF DIGITAL CORE PIXEL PORT 300 RSET 75 75 75 75 VAA OUTPUT BUFFER DAC A OUTPUT BUFFER OUTPUT BUFFER OUTPUT BUFFER DAC C DAC D DAC B Figure 71. Output DAC Buffering Configuration 2N2907 75 75 OUTPUT TO TV/MONITOR 36 INPUT VCC Figure 72. Recommended Output DAC Buffer APPENDIX 7 OPTIONAL DAC BUFFERING |
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