ADSP-2186 datasheet(12/36 Pages) AD

12 / 36 page

ADSP-2186

–12–

REV. A

I/O Space Instructions

The instructions used to access the ADSP-2186’s I/O memory

space are as follows:

Syntax:

IO(addr) = dreg

dreg = IO(addr);

where addr is an address value between 0 and 2047 and dreg is

any of the 16 data registers.

Examples:

IO(23) = AR0;

AR1 = IO(17);

Description:

The I/O space read and write instructions move

data between the data registers and the I/O

memory space.

DESIGNING AN EZ-ICE-COMPATIBLE SYSTEM

The ADSP-2186 has on-chip emulation support and an

ICE-Port, a special set of pins that interface to the EZ-ICE. These

features allow in-circuit emulation without replacing the target

system processor by using only a 14-pin connection from the

target system to the EZ-ICE. Target systems must have a 14-pin

connector to accept the EZ-ICE’s in-circuit probe, a 14-pin plug.

Emulation Reset and the Mode Pins

The Mode A, B, and C pins are located on the rising edge of the

RESET signal. However, when the emulator reset (ERESET) is

asserted by the EZ-ICE, the DSP performs a chip reset, and the

initial mode information is erased, and the logic values on the

mode pins are latched. You must take into consideration the

value of the mode pins before issuing a chip reset command

from the EZ-ICE user interface. If you are using a passive

method of maintaining mode information (as discussed in Set-

ting Memory Modes) then it does not matter that the mode

information is latched by an emulator reset. However, if you are

using the RESET pin as a method of setting the value of the

mode pins, then you have to take into consideration the effects

of an emulator reset.

One method of ensuring that the values located on the mode

pins is the one that is desired to construct a circuit like the one

shown in Figure 9. This circuit will force the value located on

the Mode C pin to zero; regardless if it latched via the RESET

or ERESET pin.

PROGRAMMABLE I/O

MODE A/PFO

RESET

ERESET

ADSP-2186

Figure 9. Boot Mode Circuit

See the ADSP-2100 Family EZ-Tools data sheet for complete

information on ICE products.

The ICE-Port interface consists of the following ADSP-2186

pins:

EBR

EBG

ERESET

EMS

EINT

ECLK

ELIN

ELOUT

These ADSP-2186 pins must be connected only to the EZ-ICE

connector in the target system. These pins have no function

except during emulation, and do not require pull-up or

pull-down resistors. The traces for these signals between the

ADSP-2186 and the connector must be kept as short as pos-

sible, no longer than three inches.

The following pins are also used by the EZ-ICE:

RESET

GND

The EZ-ICE uses the EE (emulator enable) signal to take con-

trol of the ADSP-2186 in the target system. This causes the

processor to use its ERESET, EBR and EBG pins instead of

the RESET, BR and BG pins. The BG output is three-stated.

These signals do not need to be jumper-isolated in your system.

The EZ-ICE connects to your target system via a ribbon cable

and a 14-pin female plug. The female plug is plugged onto the

14-pin connector (a pin strip header) on the target board.

Target Board Connector for EZ-ICE Probe

The EZ-ICE connector (a standard pin strip header) is shown in

Figure 10. You must add this connector to your target board

design if you intend to use the EZ-ICE. Be sure to allow enough

room in your system to fit the EZ-ICE probe onto the 14-pin

connector.

910

GND

KEY (NO PIN)

RESET

TOP VIEW

EBG

EBR

ELOUT

EINT

ELIN

ECLK

EMS

ERESET

Figure 10. Target Board Connector for EZ-ICE

The 14-pin, 2-row pin strip header is keyed at the Pin 7 loca-

tion—you must remove Pin 7 from the header. The pins must

be 0.025 inch square and at least 0.20 inch in length. Pin spac-

ing should be 0.1

× 0.1 inches. The pin strip header must have

at least 0.15-inch clearance on all sides to accept the EZ-ICE

probe plug. Pin strip headers are available from vendors such as

3M, McKenzie and Samtec.

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