REV. B

ADP3806

–13–

For an input voltage of 19 V and a 22

mH inductance, the maxi-

mum rms current is 0.26 A. A typical 10

mF or 22 mF ceramic

capacitor is a good choice to absorb this current.

Input Capacitor Ripple

As is the case with a normal buck converter, the pulse current at

the input has a high rms component. Therefore, since the input

capacitor has to absorb this current ripple, it must have an

appropriate rms current rating. The maximum input rms cur-

rent is given by

I

P

DV

DD

D

rms

BAT

IN

=

¥¥

¥

()

h

1–

(10)

where

h is the estimated converter efficiency (approximately

This is a worst-case calculation and, depending on total charge

time, the calculated number could be relaxed. Consult the

capacitor manufacturer for further technical information.

Decoupling the VCC Pin

It is a good idea to use an RC filter (R13 and C14) from the

input voltage to the IC both to filter out switching noise and to

supply bypass to the chip. During layout, this capacitor should

be placed as close to the IC as possible. Values between 0.1

mF

and 2.2

mF are recommended.

Current-Sense Filtering

During normal circuit operation, the current-sense signals can

have high frequency transients that need filtering to ensure

proper operation. In the case of the CS+ and CS– inputs, the

resistors (R3 and R4) are set to 249

W while the filter capacitor

(C13) value is 22 nF. For the system current sense circuits,

common-mode filtering from SYS+ and SYS– to ground is

needed. 470 nF ceramic capacitors (C1, C2) with 2.2

W resistors

(R1, R2) will often do. These time constants can be adjusted in

the laboratory if required but represent a good starting point.

MOSFET Selection

One of the features of the ADP3806 is that it allows use of a

high side NMOS switch instead of a more costly PMOS device.

The converter also uses synchronous rectification for optimal

efficiency. In order to use a high side NMOS, an internal boot-

strap regulator automatically generates a 7 V supply across C9.

for the two power MOSFETs. When the ADP3806 is operating

in continuous mode, the simplifying assumption can be made

that one of the two MOSFETs is always conducting the load

current. The power dissipation for each MOSFET is given by:

Upper MOS

PR

I

D

V

I

DT

f

DISS

DS ON

BAT

IN

BAT

SW

=¥

¥

¥¥

()

2

(11)

Lower MOS

PR

I

D

V

I

DT

f

DISS

DS ON

BAT

IN

BAT

SW

=¥

¥

¥¥

()

–

–

1

1

2

(12)

tion time, usually 10 ns. The first term accounts for conduction

losses while the second term estimates switching losses. Using

these equations and the manufacturer’s data sheets, the proper

device can be selected.

A Schottky diode, D1, in parallel with Q2 conducts only during

dead time between the two power MOSFETs. D1’s purpose is

to prevent the body diode of the lower N-channel MOSFET

from turning on, which could cost as much as 1% in efficiency.

One option is to use a combined MOSFET with the Schottky

diode in a single package; these integrated packages often work

better in practice. Examples are the IRF7807D2 and the Si4832.