REV. 0

ADP3164

–4–

PIN FUNCTION DESCRIPTIONS

Pin

Mnemonic

Function

1–5

VID4 –

Voltage Identification DAC Inputs. These pins are pulled up to an internal 3 V reference, providing a

VID0

Logic 1 if left open. The DAC output programs the FB regulation voltage from 1.1 V to 1.85 V. Leaving all five

DAC inputs open results in the ADP3164 going into a “No CPU” mode, shutting off its PWM outputs.

6

SHARE

Current Sharing Output. This pin is connected to the SHARE pins of other ADP3164s in multiple VRM systems

to ensure proper current sharing between the converters. The voltage at this output programs the output current

control level between CS+ and CS–.

7

COMP

Error Amplifier Output and Compensation Point.

8

GND

Ground. FB, REF, and the VID DAC of the ADP3164 are referenced to this ground. This is a low current ground

that can also be used as a return for the FB pin in remote voltage sensing applications.

9

FB

Feedback Input. Error amplifier input for remote sensing of the output voltage.

10

CT

External capacitor CT connection to ground sets the frequency of the device.

11

PWRGD

Open drain output that signals when the output voltage is outside of the proper operating range or when a phase

is not supplying current even if the output voltage is in specification.

12

CS+

Current Sense Positive Node. Positive input for the current comparator. The output current is sensed as a voltage

at this pin with respect to CS–.

13

CS–

Current Sense Negative Node. Negative input for the current comparator.

14

PGND

Power Ground. All internal biasing and logic output signals of the ADP3164 are referenced to this ground.

15

PWM4

Logic-Level Output for the Phase 4 Driver.

16

PWM3

Logic-Level Output for the Phase 3 Driver.

17

PWM2

Logic-Level Output for the Phase 2 Driver.

18

PWM1

Logic-Level Output for the Phase 1 Driver.

19

REF

3.0 V Reference Output.

20

VCC

Supply Voltage for the ADP3164.

5-BIT CODE

VID4

VID3

VID2

VID1

VID0

SHARE

COMP

GND

FB

CT

VCC

REF

PWM1

PWM2

PWM3

PWM4

PGND

CS–

CS+

PWRGD

3

1

4

5

18

17

16

2

20

19

6

7

8

9

11

14

13

12

15

ADP3164

12V

100

100nF

1 F

100nF

AD820

+

20k

10

1.2V

Figure 1. Closed-Loop Output Voltage Accuracy Test Circuit