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AD9002 bảng dữ liệu(PDF) 4 Page - Analog Devices

tên linh kiện AD9002
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AD9002 bảng dữ liệu(HTML) 4 Page - Analog Devices

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AD9002
–4–
REV. D
FUNCTIONAL DESCRIPTION
Pin #
Name
Description
1
DIGITAL GROUND
One of four digital ground pins. All digital ground pins should be connected together.
2
OVERFLOW INH
OVERFLOW INHIBIT controls the data output polarity for overvoltage inputs.
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X
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X
X
X
0X
X
X
X
X
X
X
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0
3
HYSTERESIS
The Hysteresis control voltage varies the comparator hysteresis from 0 mV to 10 mV, for a change
from –5.2 V to –2.2 V at the Hysteresis control pin. Normally converted to –5.2 V.
4+VREF
The most positive reference voltage for the internal resistor ladder.
5
ANALOG INPUT
One of two analog input pins. Both analog input pins should be connected together.
6
ANALOG GROUND
One of two analog ground pins. Both analog ground pins should be connected together.
7
ENCODE
Noninverted input of the differential encode input. This pin is driven in conjunction with
ENCODE. Data is latched on the rising edge of the ENCODE signal.
8
ENCODE
Inverted input of the differential encode input. This pin is driven in conjunction with ENCODE.
9
ANALOG GROUND
One of two analog ground pins. Both analog ground pins should be connected together.
10
ANALOG INPUT
One of two analog input pins. Both analog inputs should be connected together.
11
–VREF
The most negative reference voltage for the internal resistor ladder.
12
REFMID
The midpoint tap on the internal resistor ladder.
13
DIGITAL GROUND
One of four digital ground pins. All digital ground pins should be connected together.
14
DIGITAL –VS
One of two negative digital supply pins (nominally –5.2 V). Both digital supply pins should be con-
nected together.
15
D1 (LSB)
Digital data output.
16–19
D2–D5
Digital data output.
20
DIGITAL GROUND
One of four digital ground pins. All digital ground pins should be connected together.
21, 22
ANALOG –VS
One of two negative analog supply pins (nominally –5.2 V). Both analog supply pins should be con-
nected together.
23
DIGITAL GROUND
One of four digital ground pins. All digital ground pins should be connected together.
24, 25
D6, D7
Digital data output.
26
D8 (MSB)
Digital data output.
27
OVERFLOW
Overflow data output. Logic high indicates an input overvoltage (V IN > +VREF) if OVERFLOW
INHIBIT is enabled (overflow enabled, –5.2 V). See OVERFLOW INHIBIT.
28
DIGITAL –VS
One of two negative digital supply pins (nominally –5.2 V). Both digital supply pins should be
connected together.
DIP
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD9002
DIGITAL
GROUND
REFMID
–VREF
ANALOG INPUT
ANALOG
GROUND
ENCODE
DIGITAL
GROUND
OVERFLOW INH
HYSTERESIS
+VREF
ENCODE
ANALOG
GROUND
ANALOG INPUT
D1(LSB)
D2
D3
D4
D5
DIGITAL
GROUND
ANALOG –VS
DIGITAL –VS
OVERFLOW
D8(MSB)
D7
ANALOG –VS
DIGITAL
GROUND
D6
DIGITAL –VS
LCC
28
27
1
2
3
426
25
21
22
23
24
19
20
5
6
7
8
9
10
11
12 13 14 15 16 17 18
TOP VIEW
(Not to Scale)
D7
D6
DIGITAL
GROUND
ANALOG –VS
ANALOG –VS
D5
ANALOG INPUT
ANALOG
GROUND
ENCODE
ENCODE
ANALOG INPUT
–VREF
AD9002
DIGITAL
GROUND
ANALOG
GROUND
JLCC
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
25 24
23 22
21 20 19
5
6
7
8
9
10
11
18
17
16
15
14
13
12
26
27
28
1
2
3
4
D3
D2
D1(LSB)
DIGITAL –VS
REFMID
D8(MSB)
OVERFLOW
DIGITAL –VS
DIGITAL
GROUND
OVERFLOW INH
HYSTERESIS
+VREF
D4
AD9002
DIGITAL
GROUND
PIN DESIGNATIONS



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