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AD831AP bảng dữ liệu(PDF) 8 Page - Analog Devices

tên linh kiện AD831AP
Giải thích chi tiết về linh kiện  Low Distortion Mixer
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AD831AP bảng dữ liệu(HTML) 8 Page - Analog Devices

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AD831
REV. B
–8–
Low-Pass Filtering
A simple low-pass filter may be added between the mixer and
the output amplifier by shunting the internal resistive loads (an
equivalent resistance of about 14
Ω with a tolerance of 20%)
with external capacitors; these attenuate the sum component in
a down-conversion application (Figure 20). The corner fre-
quency of this one-pole low-pass filter (f = (2
π RC
F)
–1) should
be placed about an octave above the difference frequency IF.
Thus, for a 70 MHz IF, a –3 dB frequency of 140 MHz might
be chosen, using CF = (2 × π × 14 Ω × 140 MHz)
–1
≈ 82 pF, the
nearest standard value.
IFN
VP
IFP
AP
GND
VN
RFP
RFN
VN
VP
LON
LOP
VP
GND
BIAS
VN
AD831
Top View
50
Ω
50
Ω
6
7
8
4
5
9
10
11
12
13
AN
VFB
COM
OUT
14
15
16
17
18
1
2
3
19
20
CF
CF
CF =
=
1
2
π f R
1
89.7 f
Figure 20. Low-Pass Filtering Using External Capacitors
Using the Output Amplifier
The AD831’s output amplifier converts the mixer core’s dif-
ferential current output into a single-ended voltage and provides
an output as high as
±1 V peak into a 50 Ω load (+10 dBm).
For unity gain operation (Figure 21), the inputs AN and AP
connect to the open-collector outputs of the mixer’s core and
OUT connects to VFB.
IF
OUTPUT
IFN
VP
IFP
AP
GND
VN
RFP
RFN
VN
VP
LON
LOP
VP
GND
BIAS
VN
AD831
Top View
50
Ω
50
Ω
6
7
8
4
5
9
10
11
12
13
AN
VFB
COM
OUT
14
15
16
17
18
1
2
3
19
20
Figure 21. Output Amplifier Connected for Unity Gain
Operation
The mixer has two open-collector outputs (differential cur-
rents) at pins IFN and IFP. These currents may be used to pro-
vide nominal unity RF-to-IF gain by connecting a center-tapped
transformer (1:1 turns ratio) to pins IFN and IFP as shown in
Figure 18.
20
2
Q3
R5
1k
Ω
LIMITING
AMPLIFIER
VP
18mA TYP
IFN
IFP
18mA TYP
5k
Ω
5k
Ω
Q1
Q2
Q5
Q6
Q4
R4
1k
Ω
R1
20
Ω
R2
20
Ω
R3
26
Ω
Q7
36mA TYP
LOP
LON
RFP
RFN
VP
BIAS
VN
LOCAL
OSCILLATOR
INPUT
RF
INPUT
1
10
11
6
7
BIAS
CURRENT
IF OUTPUT
VPOS
MCLT4-1H
Figure 18. Connections for Transformer Coupling to the IF
Output
Programming the Bias Current
Because the AD831’s RF port is a Class-A circuit, the maxi-
mum RF input is proportional to the bias current. This bias cur-
rent may be reduced by connecting a resistor from the BIAS pin
to the positive supply (Figure 19). For normal operation, the
BIAS pin is left unconnected. For lowest power consumption,
the BIAS pin is connected directly to the positive supply. The
range of adjustment is 100 mA for normal operation to
45 mA total current at minimum power consumption.
1.33k
Ω
0.1µF
VPOS
NOTE ADDED
RESISTOR
IFN
VP
IFP
AP
GND
VN
RFP
RFN
VN
VP
LON
LOP
VP
GND
BIAS
VN
AD831
Top View
50
Ω
50
Ω
6
7
8
4
5
9
10
11
12
13
AN
VFB
COM
OUT
14
15
16
17
18
1
2
3
19
20
Figure 19. Programming the Quiescent Current



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