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AD722 bảng dữ liệu(PDF) 12 Page - Analog Devices

tên linh kiện AD722
Giải thích chi tiết về linh kiện  RGB to NTSC/PAL Encoder
PDF  12 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

AD722 bảng dữ liệu(HTML) 12 Page - Analog Devices

Back Button AD722 Datasheet HTML 4Page - Analog Devices AD722 Datasheet HTML 5Page - Analog Devices AD722 Datasheet HTML 6Page - Analog Devices AD722 Datasheet HTML 7Page - Analog Devices AD722 Datasheet HTML 8Page - Analog Devices AD722 Datasheet HTML 9Page - Analog Devices AD722 Datasheet HTML 10Page - Analog Devices AD722 Datasheet HTML 11Page - Analog Devices AD722 Datasheet HTML 12Page - Analog Devices  
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REV. 0
–12–
AD722
Synchronous vs. Asynchronous Operation
The source of RGB video and synchronization used as an input
to the AD722 in some systems is derived from the same clock
signal as used for the AD722 subcarrier input (FIN). These
systems are said to be operating synchronously. In systems
where two different clock sources are used for these signals, the
operation is called asynchronous.
The AD722 supports both synchronous and asynchronous op-
eration, but some minor differences might be noticed between
them. These can be caused by some details of the internal
circuitry of the AD722.
There is an attempt to process all of the video and synchroniza-
tion signals totally asynchronous with respect to the subcarrier
signal. This was achieved everywhere except for the sampled de-
lay line used in the luminance channel to time align the lumi-
nance and chrominance. This delay line uses a signal at twice
the subcarrier frequency as its clock.
The phasing between the delay line clock and the luminance sig-
nal (with inserted composite sync) will be constant during syn-
chronous operation, while the phasing will demonstrate a
periodic variation during asynchronous operation. The jitter of
the asynchronous video output will be slightly greater due to
these periodic phase variations.
1
2
2
1
33
44
5
6
5
6
77
=+
NONINTERLACED
ODD FIELD
EVEN FIELD
a. Conversion of Noninterlace to Interlace
2
1
3
4
5
6
7
=+
NONINTERLACED
ODD FIELD
EVEN FIELD
1
2
3
4
5
6
7
b. Line Doubled Conversion Technique
2
1
3
4
5
6
7
=+
NONINTERLACED
ODD FIELD
EVEN FIELD
1
2
3
4
5
6
7
c. Line Averaging Technique
Figure 17.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead SOIC (R-16) (Wide Body)
PIN 1
0.2992 (7.60)
0.2914 (7.40)
0.4193 (10.65)
0.3937 (10.00)
1
16
9
8
0.0192 (0.49)
0.0138 (0.35)
0.0500 (1.27)
BSC
0.1043 (2.65)
0.0926 (2.35)
0.4133 (10.50)
0.3977 (10.00)
0.0118 (0.30)
0.0040 (0.10)
0.0125 (0.32)
0.0091 (0.23)
0.0500 (1.27)
0.0157 (0.40)
8
°
0
°
0.0291 (0.74)
0.0098 (0.25)
x 45
°



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