REV. E

–9–

AD637

VECTOR SUMMATION

Vector summation can be accomplished through the use of two

AD637s as shown in Figure 16. Here the averaging capacitors

are omitted (nominal 100 pF capacitors are used to insure

stability of the filter amplifier), and the outputs are summed as

shown. The output of the circuit is

Y

2

This concept can be expanded to include additional terms by

feeding the signal from Pin 9 of each additional AD637 through

a 10 k

Ω resistor to the summing junction of the AD711, and ty-

ing all of the denominator inputs (Pin 6) together.

Y

IC1 and IC2, the output will be

Y

This circuit has a dynamic range of 10 V to 10 mV and is lim-

ited only by the 0.5 mV offset voltage of the AD637. The useful

bandwidth is 100 kHz.

BUFFER

AD637

SQUARER/DIVIDER

BIAS

SECTION

FILTER

25k

25k

1

2

3

4

5

6

7

14

13

12

11

10

9

8

+

ABSOLUTE

VALUE

NC

SIGNAL

INPUT

NC

100 F

AD548JN

FILTERED

V rms OUTPUT

1 F

1 F

1000pF

6.8M

NOTE: VALUES CHOSEN TO GIVE 0.1%

AVERAGING ERROR @ 1Hz

1M

50k

OUTPUT

OFFSET

ADJUST

3.3 F

499k

1%

R

3.3M

3.3M

2

V rms

Figure 15. AD637 as a Low Frequency RMS Converter

BUFFER

AD637

SQUARER/DIVIDER

BIAS

SECTION

FILTER

25k

25k

1

2

3

4

5

6

7

14

13

12

11

10

9

8

ABSOLUTE

VALUE

100pF

BUFFER

AD637

SQUARER/DIVIDER

BIAS

SECTION

FILTER

25k

25k

1

2

3

4

5

6

7

14

13

12

11

10

9

8

ABSOLUTE

VALUE

100pF

5pF

10k

AD711K

EXPANDABLE

10k

10k

20k

Figure 16. AD637 Vector Sum Configuration