REV. C

AD624

–11–

By establishing a reference at the “low” side of a current setting

resistor, an output current may be defined as a function of input

voltage, gain and the value of that resistor. Since only a small

current is demanded at the input of the buffer amplifier A2, the

drift specifications of A2 must be added to the output offset and

drift specifications of the IA.

PROGRAMMABLE GAIN

Figure 38 shows the AD624 being used as a software program-

mable gain amplifier. Gain switching can be accomplished with

mechanical switches such as DIP switches or reed relays. It

should be noted that the “on” resistance of the switch in series

with the internal gain resistor becomes part of the gain equation

and will have an effect on gain accuracy.

A significant advantage in using the internal gain resistors in a

programmable gain configuration is the minimization of thermo-

couple signals which are often present in multiplexed data

acquisition systems.

If the full performance of the AD624 is to be achieved, the user

must be extremely careful in designing and laying out his circuit

to minimize the remaining thermocouple signals.

The AD624 can also be connected for gain in the output stage.

Figure 39 shows an AD547 used as an active attenuator in the

output amplifier’s feedback loop. The active attenuation pre-

sents a very low impedance to the feedback resistors therefore

minimizing the common-mode rejection ratio degradation.

Another method for developing the switching scheme is to use a

DAC. The AD7528 dual DAC which acts essentially as a pair of

switched resistive attenuators having high analog linearity and

symmetrical bipolar transmission is ideal in this application. The

multiplying DAC’s advantage is that it can handle inputs of

either polarity or zero without affecting the programmed gain.

The circuit shown uses an AD7528 to set the gain (DAC A) and

to perform a fine adjustment (DAC B).

225.3

124

4445.7

80.2

50

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

10k

20k

20k

10k

10k

50

1 F

35V

–IN

+IN

10k

10k

INPUT

OFFSET

NULL

OUTPUT

OFFSET

NULL

10k

TO –V

(+INPUT)

(–INPUT)

39.2k

WR

A4

A3

A2

A1

1k

10pF

28.7k

316k

1k

1k

AD624

AD7590

AD711

Figure 39. Programmable Output Gain

225.3

124

4445.7

80.2

50

G = 100

K1

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

10k

20k

20k

10k

10k

50

1 F

35V

–IN

+IN

R2

10k

R1

10k

INPUT

OFFSET

TRIM

OUTPUT

OFFSET

TRIM

RELAY

SHIELDS

G = 200

K2

G = 500

K3

D1

D2

D3

Y0

K2

K3

74LS138

DECODER

7407N

BUFFER

DRIVER

A

B

Y1

Y2

INPUTS

GAIN

RANGE

+5V

10 F

C1

C2

K1 – K3 =

THERMOSEN DM2C

4.5V COIL

D1 – D3 = IN4148

ANALOG

COMMON

GAIN TABLE

A

B

GAIN

0

0

100

0

1

500

1

0

200

11

1

LOGIC

COMMON

K1

OUT

10k

+5V

AD624

NC

Figure 38. Gain Programmable Amplifier