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AD607 bảng dữ liệu(PDF) 21 Page - Analog Devices

tên linh kiện AD607
Giải thích chi tiết về linh kiện  Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem
PDF  24 Pages
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AD607 bảng dữ liệu(HTML) 21 Page - Analog Devices

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AD607
REV. 0
–21–
The board provides SMA connectors for the RF and LO port
inputs, the demodulated I and Q outputs, the manual gain con-
trol (MGC) input, the PLL input, and the power-up input. In
addition, the IF output is also available at an SMA connector;
this may be connected to the PLL input for carrier recovery to
realize synchronous AM and FM detection via the I and Q de-
modulators, respectively. Table III lists the AD607 Evaluation
Board’s I/O Connectors and their functions.
Table III. AD607 Evaluation Board Input and Output Connections
Reference
Connector
Approximate
Designation
Type
Description
Coupling
Signal Level
Comments
J1
SMA
Frequency
DC
±400 mV
This pin needs to be biased at VMID
Detector Input
and ac coupled when driven by an
external signal generator.
J2
SMA
Power Up
DC
CMOS Logic
Tied to Positive Supply by Jumper J10.
Level Input
J3
SMA
LO Input
AC
–16 dBm
Input is terminated in 50
Ω.
(
±50 mV)
J4
SMA
RF Input
AC
–15 dBm max
Input is terminated in 50
Ω.
(
±54 mV)
J5
SMA
MGC Input
DC
0.4 V to 2.0 V
Jumper is set for Manual Gain Control
or
(3 V Supply)
Input; See Table I for Control Voltage
RSSI Output
(GREF = VMID)
Values.
J6
SMA
IF Output
AC
NA
This signal level depends on the
AD607’s gain setting.
J7
SMA
Q Output
AC
NA
This signal level depends on the
AD607’s gain setting.
J8
SMA
I Output
AC
NA
This signal level depends on the
AD607’s gain setting.
J9
Jumper
Ties GREF
NA
NA
Sets gain-control Scale Factor (SF);
to VMID
SF = 75/VMID in dB/V, where
VMID = VPOS/2.
J10
Jumper
Ties Power-Up
NA
NA
Remove to test Power Up/Down.
to Positive
Supply
T1
Terminal Pin
Power Supply
DC
DC
2.7 V to 5.5 V
Positive Input
Draws 8.5 mA at
(VPS1, VPS2)
midgain connection.
T2
Terminal Pin
Power Supply
DC
0 V
Return (GND)



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