PRELIMINARY TECHNICAL DATA

AD5582/AD5583

This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no obligation regarding future

manufacture unless otherwise agreed to in writing.

REV PrC, 23 APR '01

6

CS

R/W

tRDS=0

A0/A1

DATA VALID

DATA OUT

tCSD = 100ns max

tAS =TBD

tRCS = 130ns

tRDH=TBD

tDZ = 100ns max

tAH =0

DATA OUTPUT (READ TIMING)

HI-Z

HI-Z

CS

R/W

tWS =TBD

A0/A1

LDAC

tLS = 70ns

tLH = 30ns

tAS =0

tWCS =TBD

tWH =0

tAH =0

DATA WRITE (INPUT AND OUTPUT REGISTERS) TIMING

DATA IN

tWDS =0ns

tWDH =0

RESET

tRESET = 50ns

tLDW = 50ns