AD5302 datasheet(2/16 Pages) AD

2 / 16 page

REV. 0

–2–

AD5302/AD5312/AD5322–SPECIFICATIONS (V

DD = +2.5 V to +5.5 V; VREF = +2 V; RL = 2 k

to GND; CL = 200 pF to GND; all specifications TMIN to TMAX unless otherwise noted.)

B Version

Parameter

Min

Typ

Max

Units

Conditions/Comments

DC PERFORMANCE

3, 4

AD5302

Resolution

Bits

Relative Accuracy

±0.15

±1LSB

Differential Nonlinearity

±0.02

±0.25

LSB

Guaranteed Monotonic by Design Over All Codes

AD5312

Resolution

Bits

Relative Accuracy

±0.5

±3LSB

Differential Nonlinearity

±0.05

±0.5

LSB

Guaranteed Monotonic by Design Over All Codes

AD5322

Resolution

Bits

Relative Accuracy

±2

±12

LSB

Differential Nonlinearity

±0.2

±1

LSB

Guaranteed Monotonic by Design Over All Codes

Offset Error

±0.4

±3

% of FSR

See Figures 2 and 3

Gain Error

±0.15

±1

% of FSR

See Figures 2 and 3

Lower Deadband

See Figures 2 and 3

Offset Error Drift

–12

ppm of FSR/

°C

Gain Error Drift

–5

ppm of FSR/

°C

Power Supply Rejection Ratio

–60

∆V

DD = ± 10%

DC Crosstalk

µV

DAC REFERENCE INPUTS

VREF Input Range

VDD

Buffered Reference Mode

0VDD

Unbuffered Reference Mode

VREF Input Impedance

>10

Ω

Buffered Reference Mode

180

Ω

Unbuffered Reference Mode, Input Impedance = RDAC

Reference Feedthrough

–90

Frequency = 10 kHz

Channel-to-Channel Isolation

–80

Frequency = 10 kHz

OUTPUT CHARACTERISTICS

Minimum Output Voltage

0.001

V min

This is a measure of the minimum and maximum

Maximum Output Voltage

VDD – 0.001

V max

drive capability of the output amplifier.

DC Output Impedance

0.5

Ω

Short Circuit Current

VDD = +5 V

VDD = +3 V

Power-Up Time

2.5

µs

Coming Out of Power-Down Mode. VDD = +5 V

µs

Coming Out of Power-Down Mode. VDD = +3 V

LOGIC INPUTS

Input Current

±1

µA

VIL, Input Low Voltage

0.8

VDD = +5 V ± 10%

0.6

VDD = +3 V ± 10%

0.5

VDD = +2.5 V

VIH, Input High Voltage

2.4

VDD = +5 V

± 10%

2.1

VDD = +3 V

± 10%

2.0

VDD = +2.5 V

Pin Capacitance

3.5

POWER REQUIREMENTS

VDD

2.5

5.5

IDD Specification Is Valid for All DAC Codes

IDD (Normal Mode)

Both DACs Active and Excluding Load Currents

VDD = +4.5 V to +5.5 V

300

450

µA

Both DACs in Unbuffered Mode. VIH = VDD and

VDD = +2.5 V to +3.6 V

230

350

µAV

IL = GND. In Buffered Mode, extra current is

typically x

µA per DAC where x = 5 µA + V

REF/RDAC.

IDD (Full Power-Down)

VDD = +4.5 V to +5.5 V

0.2

µA

VDD = +2.5 V to +3.6 V

0.05

µA

NOTES

1See Terminology.

2Temperature range: B Version: –40

°C to +105°C.

3DC specifications tested with the outputs unloaded.

4Linearity is tested using a reduced code range: AD5302 (Code 8 to 248); AD5312 (Code 28 to 995); AD5322 (Code 115 to 3981).

5Guaranteed by design and characterization, not production tested.

6In order for the amplifier output to reach its minimum voltage, Offset Error must be negative. In order for the amplifier output to reach its maximum voltage,

VREF = VDD and “Offset plus Gain” Error must be positive.

Specifications subject to change without notice.

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