AD1885

–20–

REV. 0

JS0_OE

Enables JS0 pin as a general-purpose output.

JS1_OE

Enables JS1 pin as a general-purpose output.

JS0PUDIS

Setting the JS0PUDIS bit disables the JS0 pin internal pull-up.

JS1PUDIS

Setting the JS1PUDIS bit disables the JS1 pin internal pull-up.

JS0_OUT

When enabled as GPO, the JS0 pin reflects the state of the JS0_OUT bit.

JS1_OUT/FUNCT When enabled as GPO, the JS1 pin reflects the state of the JS1_OUT bit, otherwise this bit can be set to change

the functionality of JS1 so that only LINE_OUT is muted when JS1 is high.

Serial Configuration (Index 74h)

g

e

Rg

e

R g

e

R g

e

Rg

e

R

m

u

Nm

u

N m

u

N m

u

Nm

u

N

e

m

a

Ne

m

a

N

e

m

a

N

e

m

a

Ne

m

a

N5

1

D5

1

D 5

1

D 5

1

D5

1

D4

1

D4

1

D 4

1

D 4

1

D4

1

D3

1

D3

1

D 3

1

D 3

1

D3

1

D2

1

D2

1

D 2

1

D 2

1

D2

1

D1

1

D1

1

D 1

1

D 1

1

D1

1

D0

1

D0

1

D 0

1

D 0

1

D0

1

D9

D9

D9

D9

D9

D8

D8

D8

D8

D8

D7

D7

D7

D7

D7

D6

D6

D6

D6

D6

D5

D5

D5

D5

D5

D4

D4

D4

D4

D4

D3

D3

D3

D3

D3

D2

D2

D2

D2

D2

D1

D1

D1

D1

D1

D0

D0

D0

D0

D0

Dt

l

u

a

f

e

Dt

l

u

a

f

e

D

t

l

u

a

f

e

D

t

l

u

a

f

e

Dt

l

u

a

f

e

D

h

4

7h

4

7 h

4

7 h

4

7h

4

7

l

a

i

r

e

Sl

a

i

r

e

S

l

a

i

r

e

S

l

a

i

r

e

Sl

a

i

r

e

S

n

o

i

t

a

r

u

g

i

f

n

o

Cn

o

i

t

a

r

u

g

i

f

n

o

C

n

o

i

t

a

r

u

g

i

f

n

o

C

n

o

i

t

a

r

u

g

i

f

n

o

Cn

o

i

t

a

r

u

g

i

f

n

o

C

T

O

L

ST

O

L

S

T

O

L

S

T

O

L

ST

O

L

S

6

16

16

16

16

1

2

M

G

E

R2

M

G

E

R

2

M

G

E

R

2

M

G

E

R2

M

G

E

R1

M

G

E

R1

M

G

E

R

1

M

G

E

R

1

M

G

E

R1

M

G

E

R0

M

G

E

R0

M

G

E

R

0

M

G

E

R

0

M

G

E

R0

M

G

E

RX

X

X

X

XX

X

X

X

XR

W

H

DR

W

H

D

R

W

H

D

R

W

H

DR

W

H

DX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

XX

X

X

X

X

Note: this register is not reset when the reset register (register 00h) is written.

DHWR

Disable Hardware Reset.

REGM0

Master Codec register mask.

REGM1

Slave 1 Codec register mask.

REGM2

Slave 2 Codec register mask.

SLOT16

Enable 16-bit slots.

If your system uses only a single AD1885, you can ignore the register mask.

SLOT16 makes all AC-Link slots 16 bits in length, formatted into 16 slots.

Miscellaneous Control Bits (Index 76h)

g

e

Rg

e

R g

e

R g

e

Rg

e

R

m

u

Nm

u

N m

u

N m

u

Nm

u

N

e

m

a

Ne

m

a

N

e

m

a

N

e

m

a

Ne

m

a

N5

1

D5

1

D 5

1

D 5

1

D5

1

D4

1

D4

1

D 4

1

D 4

1

D4

1

D3

1

D3

1

D 3

1

D 3

1

D3

1

D2

1

D2

1

D 2

1

D 2

1

D2

1

D1

1

D1

1

D 1

1

D 1

1

D1

1

D0

1

D0

1

D 0

1

D 0

1

D0

1

D9

D9

D9

D9

D9

D8

D8

D8

D8

D8

D7

D7

D7

D7

D7

D6

D6

D6

D6

D6

D5

D5

D5

D5

D5

D4

D4

D4

D4

D4

D3

D3

D3

D3

D3

D2

D2

D2

D2

D2

D1

D1

D1

D1

D1

D0

D0

D0

D0

D0

Dt

l

u

a

f

e

Dt

l

u

a

f

e

D

t

l

u

a

f

e

D

t

l

u

a

f

e

Dt

l

u

a

f

e

D

h

6

7h

6

7 h

6

7 h

6

7h

6

7s

t

i

B

l

o

r

t

n

o

C

c

s

i

Ms

t

i

B

l

o

r

t

n

o

C

c

s

i

M

s

t

i

B

l

o

r

t

n

o

C

c

s

i

M

s

t

i

B

l

o

r

t

n

o

C

c

s

i

Ms

t

i

B

l

o

r

t

n

o

C

c

s

i

M

C

A

DC

A

D C

A

D C

A

DC

A

D

Z

Z

Z

Z

Z

I

M

P

LI

M

P

L

I

M

P

L

I

M

P

LI

M

P

L

X

X

X

X

X

X

X

X

X

XM

A

DM

A

D M

A

D M

A

DM

A

DS

M

DS

M

D

S

M

D

S

M

DS

M

DR

S

L

DR

S

L

D

R

S

L

D

R

S

L

DR

S

L

DX

X

X

X

XR

S

L

AR

S

L

A

R

S

L

A

R

S

L

AR

S

L

A

D

O

MD

O

M D

O

M D

O

MD

O

M

N

EN

EN

EN

EN

E

0

1

X

R

S0

1

X

R

S

0

1

X

R

S

0

1

X

R

S0

1

X

R

S

7

D7

D7

D7

D7

D

8

X

R

S8

X

R

S

8

X

R

S

8

X

R

S8

X

R

S

7

D7

D7

D7

D7

D

X

X

X

X

XX

X

X

X

XR

S

R

DR

S

R

D

R

S

R

D

R

S

R

DR

S

R

DX

X

X

X

XR

S

R

AR

S

R

A

R

S

R

A

R

S

R

AR

S

R

Ah

0

0

0

0h

0

0

0

0

h

0

0

0

0

h

0

0

0

0h

0

0

0

0

ARSR

ADC right sample generator select

0 = SR0 Selected (32h)

1 = SR1 Selected (2Ch).

DRSR

DAC right sample generator select

0 = SR0 Selected (32h)

1 = SR1 Selected (2Ch).

SRX8D7

Multiply SR1 rate by 8/7.

SRX10D7

Multiply SR1 rate by 10/7. SRX10D7 and SRX8D7 are mutually exclusive.

MODEN

Modem filter enable (left channel only). Change only when DACs and ADCs are powered down.

ALSR

ADC left sample generator select

0 = SR0 Selected (32h)

1 = SR1 Selected (2Ch).

DLSR

DAC left sample generator select

0 = SR0 Selected (32h)

1 = SR1 Selected (2Ch).

DMS

Digital Mono Select.

0 = Mixer

1 = Left DAC and Right DAC.

DAM

Digital Audio Mode. DAC Outputs bypass analog mixer and sent directly to the codec output.

LPMIX

Low Power Mixer.

DACZ

Zero fill (vs. repeat) if DAC is starved for data.