AD1376JD datasheet(3/8 Pages) AD

3 / 8 page

–3–

REV. B

AD1376/AD1377

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±18 V

Logic Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V

Analog Inputs (Pins 24 and 25) . . . . . . . . . . . . . . . . . . .

±25 V

Analog Ground-to-Digital Ground . . . . . . . . . . . . . . .

±0.3 V

Digital Inputs . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +175

°C

Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15

°C

Lead Temperature (10 seconds) . . . . . . . . . . . . . . . . . +300

°C

*Absolute maximum ratings are limiting values to be applied individually, and

beyond which the service ability of the circuit may be impaired. Functional

operability is not necessarily implied. Exposure to absolute maximum rating

conditions for an extended period of time may affect device reliability.

ORDERING GUIDE

Maximum Conversion

Temperature

Linearity

Time

Package

Model

Range

Error

(16 Bits)

Option*

AD1376JD

°C to +70°C ±0.006%

µs

DH-32E

AD1376KD 0

°C to +70°C ±0.003%

µs

DH-32E

AD1377JD

°C to -70°C

±0.006%

µs

DH-32E

AD1377KD 0

°C to +70°C ±0.003%

µs

DH-32E

*DH-32E = Ceramic DIP.

Model

AD1376JD/AD1377JD

AD1376KD/AD1377KD

Units

Status

Logic “1” During Conversion

Status Output Drive

5 (max)

LSTTL Loads

Internal Clock

Clock Output Drive

5 (max)

LSTTL Loads

Frequency

1040/1750

kHz

TEMPERATURE RANGE

Specification

0 to –70

°C

Operating

–25 to +85

°C

Storage

–55 to +125

°C

NOTES

1Logic “0” = 0.8 V, max. Logic “1” = 2.0 V, min for inputs. For digital outputs Logic “0” = +0.4 V max. Logic “1” = 2.4 V min.

2Tested on

± 10 V and 0 V to +10 V ranges.

3Adjustable to zero.

4Full-Scale Range.

5Guaranteed but not 100% production tested.

6Conversion time may be shortened with “Short Cycle” set for lower resolution.

7CSB–Complementary Straight Binary. COB–Complementary Offset Binary. CTC–Complementary Twos Complement.

8CTC coding obtained by inverting MSB (Pin 1).

9With Pin 23, clock rate controls tied to digital ground.

Specifications subject to change without notice.

Figure 1. Linearity Error vs. Temperature

Figure 2. AD1376 Nonlinearity vs. Conversion Time

Figure 3. Gain Drift Error vs. Temperature

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