Preliminary W78LE52

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OSC

1/12

PRESCALER

14-BIT TIMER

CLEAR

CLRW

EXTERNAL

RESET

INTERNAL

RESET

WIDL

IDLE

ENW

Watchdog Timer Block Diagram

Typical Watch-Dog time-out period when OSC = 20 MHz

PS2 PS1 PS0

WATCHDOG TIME-OUT PERIOD

0

0

0

19.66 mS

0

1

0

39.32 mS

0

0

1

78.64 mS

0

1

1

157.28 mS

1

0

0

314.57 mS

1

0

1

629.14 mS

1

1

0

1.25 S

1

1

1

2.50 S

Clock

The W78LE52 is designed to be used with either a crystal oscillator or an external clock. Internally,

the clock is divided by two before it is used. This makes the W78LE52 relatively insensitive to duty

cycle variations in the clock. The W78LE52 incorporates a built-in crystal oscillator. To make the

oscillator work, a crystal must be connected across pins XTAL1 and XTAL2. In addition, a load

capacitor must be connected from each pin to ground. An external clock source should be connected

to pin XTAL1. Pin XTAL2 should be left unconnected. The XTAL1 input is a CMOS-type input, as

required by the crystal oscillator.

Power Management

Idle Mode

The idle mode is entered by setting the IDL bit in the PCON register. In the idle mode, the internal

clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The

processor will exit idle mode when either an interrupt or a reset occurs.

Power-down Mode

When the PD bit of the PCON register is set, the processor enters the power-down mode. In this

mode all of the clocks are stopped, including the oscillator. The only way to exit power-down mode is

by a reset.