W49V002FAQ datasheet(20/32 Pages) WINBOND

20 / 32 page

W49V002FA

- 20 -

Timing Waveforms for Programmer Interface Mode, continued

Chip Erase Timing Diagram

DQ[7:0]

SB2

SB1

SB0

SB3

SB4

SB5

Internal Erasure Starts

TWP

TWPH

TEC

Note: The internal address A[17:0] are converted from external Column/Row address.

Column/Row Address are mapped to the Low/High order internal address.

i.e. Column Address A[10:0] are mapped to the internal A[10:0],

Row Address A[6:0] are mapped to the internal A[17:11].

(Internal A[17:0])

Six-byte code for 3.3V-only software chip erase

5555

2AAA

5555

2AAA

5555

A[10:0]

#OE

#WE

Sector Erase Timing Diagram

SB2

SB1

SB0

A[10:0]

DQ[7:0]

SB3

SB4

SB5

Internal Erase starts

Six-byte code for 3.3V-only software

sector erase

TWP

TWPH

TEC

5555

2AAA

5555

2AAA

SA = Sector Address, Please ref. to the "Table of Command Definition"

Note: The internal address A[17:0] are converted from external Column/Row address.

Column/Row Address are mapped to the Low/High order internal address.

i.e. Column Address A[10:0] are mapped to the internal A[10:0],

Row Address A[6:0] are mapped to the internal A[17:11].

(Internal A[17:0])

#OE

#WE

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