RT9722 datasheet(11/14 Pages) RICHTEK

11 / 14 page

RT9722

DS9722-00 August 2011

www.richtek.com

Figure 4. RT9722 Maximum Power Dissipation Derating

Curve

0.00

0.10

0.20

0.30

0.40

0.50

0.60

0.70

025

100

125

Ambient Temperature (°C)

WDFN-6L 2x2

SOT-23-5/SOT-23-6

Single Layer PCB

Layout Consideration

For the best performance of the RT9722, careful PCB

layout is necessary. The following guidelines must be

considered:

Keep all input and output traces as short and wide as

possible.

Locate the bypass capacitors as close as possible to

the input and output pin of the RT9722.

Avoid vias as much as possible. If vias are necessary,

make them as large as feasible.

Place a ground plane under all circuitry to lower both

resistance and inductance and improve DC and transient

performance (Use a separate ground and power plane if

possible).

Figure 5. PCB Layout Guide

PD(MAX) = (125

°C − 25°C) / (165°C/W) = 0.606W for

WDFN-6L 2x2 package

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance

θJA. For the RT9722 Figure 4 shows the

maximum power dissipation allowed under various ambient

temperatures.

VOUT GND SET

VIN

EN/EN

FLG

Rpull-up

CIN

COUT RSET

The input and output

capacitors should be

placed as close as

possible to the IC.

The main current

trace should be

as possible as

short and wide.

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