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WM8351 bảng dữ liệu(PDF) 32 Page - Wolfson Microelectronics plc

tên linh kiện WM8351
Giải thích chi tiết về linh kiện  Wolfson AudioPlus??Stereo CODEC with Power Management
PDF  330 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
Trang chủ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8351 bảng dữ liệu(HTML) 32 Page - Wolfson Microelectronics plc

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WM8351
Production Data
w
PD, April 2012, Rev 4.5
32
10 SIGNAL TIMING REQUIREMENTS
10.1 SYSTEM CLOCK TIMING
Figure 14 Master Clock Timing
Master Clock Timing
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
MCLK cycle time
TMCLKY
40
ns
MCLK duty cycle
= high time / low time
60:40
40:60
10.2 AUDIO INTERFACE TIMING - MASTER MODE
Figure 15 Digital Audio Data Timing – Master Mode
Test Conditions
DCVDD = 1.8V, DBVDD = 3.3V, DGND = 0V, TA = +25
oC, Master Mode, fs = 48kHz, 24-bit data, unless otherwise stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
BCLK rise time (10pF load)
tBCLKR
3
ns
BCLK fall time (10pF load)
tBCLKF
3
ns
BCLK duty cycle
tBCLKDS
60:40
40:60
LRC propagation delay from BCLK falling edge
tDL
10
ns
ADCDAT propagation delay from BCLK falling edge
tDDA
10
ns
DACDAT setup time to BCLK rising edge
tDST
10
ns
DACDAT hold time from BCLK rising edge
tDHT
10
ns



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