WM8311 datasheet(124/302 Pages) WOLFSON

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WM8311

Pre-Production

PP, May 2012, Rev 3.1

124

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

AUX_AUX2_SEL

AUXADCIN2 input select

0 = Disable AUXADCIN2 measurement

1 = Enable AUXADCIN2 measurement

AUX_AUX1_SEL

AUXADCIN1 input select

0 = Disable AUXADCIN1 measurement

1 = Enable AUXADCIN1 measurement

Table 65 AUXADC Control

18.3 AUXADC READBACK

Measured data from the AUXADC is read via the AuxADC Data Register (R16429), which contains

two fields. The AUXADC Data Source is indicated in the AUX_DATA_SRC field; the associated

measurement data is contained in the AUX_DATA field.

Reading from the AuxADC Data Register returns a 12-bit code which represents the most recent

AUXADC measurement on the associated channel. It should be noted that every time an AUXADC

measurement is written to the AuxADC Data Register, the previous data is overwritten - the host

processor should ensure that data is read from this register before it is overwritten. The AUXADC

interrupts can be used to indicate when new data is available - see Section 18.5.

The 12-bit AUX_DATA field can be equated to the actual voltage (or temperature) according to the

following equations, where AUX_DATA is regarded as an unsigned integer:

Battery Temperature measurement varies according to the selected NTC thermistor component.

In a typical application, it is anticipated that the AUXADC Interrupts would be used to control the

AUXADC readback - the host processor should read the AUXADC Data Register in response to the

AUXADC Interrupt event. See Section 18.5 for details of AUXADC Interrupts. In Automatic AUXADC

mode, the processor should complete this action before the next measurement occurs, in order to

avoid losing any AUXADC samples. In Manual conversion mode, the interrupt signal provides

confirmation that the commanded measurement has been completed.

The control fields associated with initiating AUXADC readback are defined in Table 66.

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