WM8310CGEBSLASHV datasheet(42/291 Pages) WOLFSON

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WM8310

Pre-Production

PP, May 2012, Rev 3.1

Figure 7 Control Interface 2-wire (I2C) Register Write

The sequence of signals associated with a single register read operation is illustrated in Figure 8.

Figure 8 Control Interface 2-wire (I2C) Register Read

The Control Interface also supports other register operations, as listed above. The interface protocol

for these operations is summarised below. The terminology used in the following figures is detailed in

Table 11.

Note that, for multiple write and multiple read operations, the auto-increment option must be enabled.

This feature is enabled by default; it is described in Table 12 below.

TERMINOLOGY

DESCRIPTION

Start Condition

Repeated start

Acknowledge (SDA Low)

¯¯

Not Acknowledge (SDA High)

Stop Condition

R/W

¯¯

ReadNotWrite

0 = Write

1 = Read

[White field]

Data flow from bus master to WM8310

[Grey field]

Data flow from WM8310 to bus master

Table 11 Control Interface Terminology

Figure 9 Single Register Write to Specified Address

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