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FSUSB63 bảng dữ liệu(PDF) 2 Page - Fairchild Semiconductor |
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FSUSB63 bảng dữ liệu(HTML) 2 Page - Fairchild Semiconductor |
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2 / 3 page ![]() © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FSUSB63 • Rev. 1.0.4 10 Physical Dimensions Figure 18. 12-Lead, Ultrathin Molded Leadless Package (UMLP) Ordering Information Part Number Top Mark Operating Temperature Range Package FSUSB63UMX KG -40 to +85°C 12-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.8mm x 1.8mm x 0.55mm, 0.4mm pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. A B C SEATING PLANE RECOMMENDED LAND PATTERN NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP12Arev4. SCALE : 2X LEAD OPTION 1 SCALE : 2X LEAD OPTION 2 DETAIL A SCALE : 2X PIN#1 IDENT TOP VIEW BOTTOM VIEW 0.10 C 0.08 C 0.10 C 2X 2X SIDE VIEW 0.10 C 0.05 0.00 3 6 1 0.10 C A B 0.05 C 0.55 MAX. 12 1.80 1.80 0.40 0.25 0.15(12X) 0.35 0.45 2.10 2.10 0.40 0.563 (11X) 0.20 (12X) 1 0.152 9 0.588 DETAIL A PIN#1 IDENT (11X) PACKAGE EDGE 0.10 0.10 0.45 0.35 0.10 |
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