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WM8213SCDS/V bảng dữ liệu(PDF) 19 Page - Wolfson Microelectronics plc |
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WM8213SCDS/V bảng dữ liệu(HTML) 19 Page - Wolfson Microelectronics plc |
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19 / 38 page ![]() Production Data WM8213 w PD Rev 4.1 July 2008 19 0 1 2 3 4 5 6 7 8 0 128 256 384 512 Gain Code (PGA[8:0]) 0 0.5 1 1.5 2 2.5 3 3.5 0 128 256 384 512 Gain Code (PGA[8:0]) Max i/p V oltage LOWREFS=0 Max i/p V oltage LOWREFS=1 Figure 13 PGA Gain Characteristic Figure 14 Peak Input Voltage to Match ADC Full-scale Range ADC INPUT BLACK LEVEL ADJUST The output from the PGA can be offset to match the full-scale range of the differential ADC (2*[VRT- VRB]). For negative-going input video signals, a black level (zero differential) output from the PGA should be offset to the top of the ADC range by setting register bits PGAFS[1:0]=10. This will give an output code of FFFF (hex) from the WM8213 for zero input. If code zero is required for zero differential input then the INVOP bit should be set. For positive going input signals the black level should be offset to the bottom of the ADC range by setting PGAFS[1:0]=11. This will give an output code of 0000 (hex) from the WM8213 for zero input. Bipolar input video is accommodated by setting PGAFS[1:0]=00 or PGAFS[1:0]=01. Zero differential input voltage gives mid-range ADC output, 7FFF (hex). |
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